northbridge/intel/gm45: Use TSC for ramstage timer per default

This is a step towards isolating the timer drivers.

Change-Id: I4c9349054be0cf520cd4407be9fb393b664223a4
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13922
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Stefan Reinauer 2016-03-06 01:49:27 -08:00 committed by Martin Roth
parent 5ad9acaba6
commit 0819a47d14
1 changed files with 1 additions and 0 deletions

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@ -26,6 +26,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
select VGA
select INTEL_EDID
select INTEL_GMA_ACPI
select UDELAY_TSC
config CBFS_SIZE
hex