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mb/google/dedede/var/boten: Update gpio config for boten 

Correct GPIO settings as below reason:
1. GPP_G7 not being used but set to NF.
2. GPP_C22 and GPP_C23 is set to NC but internal pull down to 20K

BUG=b:177283756
BRANCH=dedede
TEST=emerge-dedede coreboot chromeos-bootimage and boot into emmc

Change-Id: Idf25674efa2336bde98c5abaff278484fd71ea8b
Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49348
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ben Kao <ben.kao@intel.com>
Reviewed-by: Henry Sun <henrysun@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Stanley Wu 2021-01-12 18:01:54 +08:00 committed by Karthik Ramasubramanian
parent 375d460f5f
commit 083702c32e
1 changed files with 7 additions and 0 deletions
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7
src/mainboard/google/dedede/variants/boten/gpio.c
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@ -19,6 +19,10 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C18, NONE),
/* C19 : AP_I2C_EMR_SCL */
PAD_NC(GPP_C19, NONE),
/* C22 : UART2_RTS_N */
PAD_NC(GPP_C22, NONE),
/* C23 : UART2_CTS_N */
PAD_NC(GPP_C23, NONE),
/* D12 : WCAM_RST_L */
PAD_NC(GPP_D12, NONE),
@ -46,6 +50,9 @@ static const struct pad_config gpio_table[] = {
/* E11 : AP_I2C_SUB_INT_ODL */
PAD_CFG_GPI_INT(GPP_E11, NONE, PLTRST, EDGE_BOTH),
/* G7 : SD_SDIO_WP */
PAD_NC(GPP_G7, NONE),
/* H6 : AP_I2C_CAM_SDA */
PAD_NC(GPP_H6, NONE),
/* H7 : AP_I2C_CAM_SCL */