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security/intel/txt: Get addr bits at runtime 

This removes the need for a Kconfig value.

Change-Id: Ia9f39aa1c7fb9a64c2e5412bac6e2600b222a635
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58684
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Arthur Heymans 2021-10-28 10:11:16 +02:00 committed by Patrick Georgi
parent af207a5279
commit 083aa9ecf7
2 changed files with 11 additions and 5 deletions
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14
src/security/intel/txt/getsec_mtrr_setup.inc
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@ -3,8 +3,6 @@
#include <cpu/x86/mtrr.h> #include <cpu/x86/mtrr.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#define MTRR_HIGH_MASK $((1 << (CONFIG_CPU_ADDR_BITS - 32)) - 1)
/* /*
* Configure the MTRRs to cache the BIOS ACM. No general-purpose * Configure the MTRRs to cache the BIOS ACM. No general-purpose
* registers are preserved. Inputs are taken from SSE registers: * registers are preserved. Inputs are taken from SSE registers:
@ -16,6 +14,16 @@
*/ */
.macro SET_UP_MTRRS_FOR_BIOS_ACM .macro SET_UP_MTRRS_FOR_BIOS_ACM
/* Determine CPU_ADDR_BITS and load PHYSMASK high word to %edx. */
movl $0x80000008, %eax
cpuid
movb %al, %cl
sub $32, %cl
movl $1, %edx
shl %cl, %edx
subl $1, %edx
movl %edx, %edi /* %edi contains the MTRR_HIGH_MASK */
/* Get the number of variable MTRRs */ /* Get the number of variable MTRRs */
movl $(MTRR_CAP_MSR), %ecx movl $(MTRR_CAP_MSR), %ecx
rdmsr rdmsr
@ -56,7 +64,7 @@ body_allocate_var_mtrrs:
movd %eax, %xmm1 movd %eax, %xmm1
/* Program MTRR mask */ /* Program MTRR mask */
movl MTRR_HIGH_MASK, %edx movl %edi, %edx
xorl %eax, %eax xorl %eax, %eax
subl %ebx, %eax /* %eax = 4GIB - size to cache */ subl %ebx, %eax /* %eax = 4GIB - size to cache */
orl $(MTRR_PHYS_MASK_VALID), %eax orl $(MTRR_PHYS_MASK_VALID), %eax

2
src/security/intel/txt/getsec_sclean.S
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@ -6,8 +6,6 @@
#include "getsec_mtrr_setup.inc" #include "getsec_mtrr_setup.inc"
#define MTRR_HIGH_MASK $((1 << (CONFIG_CPU_ADDR_BITS - 32)) - 1)
#define NO_EVICT_MODE 0x2e0 #define NO_EVICT_MODE 0x2e0
.align 4 .align 4