diff --git a/src/soc/intel/skylake/pei_data.c b/src/soc/intel/skylake/pei_data.c
index 47198a7b9f..caee0784e0 100644
--- a/src/soc/intel/skylake/pei_data.c
+++ b/src/soc/intel/skylake/pei_data.c
@@ -18,11 +18,15 @@
  * Foundation, Inc.
  */
 
+#include <chip.h>
 #include <console/console.h>
 #include <console/streams.h>
+#include <device/device.h>
+#include <device/pci_def.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <soc/iomap.h>
+#include <soc/pci_devs.h>
 #include <soc/pei_data.h>
 #include <soc/pei_wrapper.h>
 #include <soc/smm.h>
@@ -34,6 +38,16 @@ static void ABI_X86 send_to_console(unsigned char b)
 
 void soc_fill_pei_data(struct pei_data *pei_data)
 {
+	const struct device *dev;
+	const struct soc_intel_skylake_config *config;
+
+	/* Set the parameters for MemoryInit */
+	dev = dev_find_slot(0, PCH_DEVFN_LPC);
+	config = dev->chip_info;
+
 	pei_data->pei_version = PEI_VERSION;
 	pei_data->tx_byte = &send_to_console;
+
+	/* Force a full memory train if RMT is enabled */
+	pei_data->disable_saved_data = config->Rmt;
 }
diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index e9f0d4246b..91a496eb52 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -103,12 +103,7 @@ void soc_memory_init_params(struct romstage_params *params,
 	upd->SataMode = config->SataMode;
 	upd->EnableTraceHub = config->EnableTraceHub;
 	upd->SaGv = config->SaGv;
-
-	if (config->Rmt) {
-		upd->RMT = 1;
-		/* Force a full memory train if RMT is enabled */
-		params->pei_data->disable_saved_data = 1;
-	}
+	upd->RMT = config->Rmt;
 }
 
 void soc_display_memory_init_params(const MEMORY_INIT_UPD *old,