devicetree: Fix improper use of chip_operations
Auto-discoverable PCI devices do not require field .enable_dev of chip_operations to be set. They are matched with PCI drivers by the use of PCI vendor and device ID fields. The name given for the chip_operations struct must match the pathname the way it is present in the devicetree.cb files. If there was no match, util/sconfig would currently choose to use the empty weak declaration it creates in static.c file. Change-Id: I684a087a1f8ee4e1a5fd83450cd371fcfdbb6847 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35096 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
parent
f2e1d0ae9a
commit
08c76e1f7d
|
@ -82,12 +82,6 @@ static const struct pci_driver bayhub_bh720 __pci_driver = {
|
||||||
.devices = pci_device_ids,
|
.devices = pci_device_ids,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void bh720_enable(struct device *dev)
|
struct chip_operations drivers_generic_bayhub_ops = {
|
||||||
{
|
|
||||||
dev->ops = &bh720_ops;
|
|
||||||
}
|
|
||||||
|
|
||||||
struct chip_operations bayhub_bh720_ops = {
|
|
||||||
CHIP_NAME("BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge")
|
CHIP_NAME("BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge")
|
||||||
.enable_dev = bh720_enable,
|
|
||||||
};
|
};
|
||||||
|
|
|
@ -71,3 +71,7 @@ static const struct pci_driver rce822 __pci_driver = {
|
||||||
.vendor = PCI_VENDOR_ID_RICOH,
|
.vendor = PCI_VENDOR_ID_RICOH,
|
||||||
.devices = pci_device_ids,
|
.devices = pci_device_ids,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct chip_operations drivers_ricoh_rce822_ops = {
|
||||||
|
CHIP_NAME("RICOH RCE822")
|
||||||
|
};
|
||||||
|
|
|
@ -38,3 +38,7 @@ static const struct pci_driver soc_cavium_uart __pci_driver = {
|
||||||
.vendor = PCI_VENDOR_CAVIUM,
|
.vendor = PCI_VENDOR_CAVIUM,
|
||||||
.device = PCI_DEVICE_ID_CAVIUM_THUNDERX_UART,
|
.device = PCI_DEVICE_ID_CAVIUM_THUNDERX_UART,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct chip_operations soc_cavium_common_pci_ops = {
|
||||||
|
CHIP_NAME("Cavium ThunderX UART")
|
||||||
|
};
|
||||||
|
|
|
@ -47,3 +47,7 @@ static const struct pci_driver pcix_driver __pci_driver = {
|
||||||
.vendor = PCI_VENDOR_ID_INTEL,
|
.vendor = PCI_VENDOR_ID_INTEL,
|
||||||
.device = PCI_DEVICE_ID_INTEL_82870_1F0,
|
.device = PCI_DEVICE_ID_INTEL_82870_1F0,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct chip_operations southbridge_intel_i82870_ops = {
|
||||||
|
CHIP_NAME("Intel 82870")
|
||||||
|
};
|
||||||
|
|
|
@ -111,12 +111,6 @@ static const struct pci_driver ti_pci7620_driver __pci_driver = {
|
||||||
.device = 0xac8d,
|
.device = 0xac8d,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void ti_pci7420_enable_dev(struct device *dev)
|
|
||||||
{
|
|
||||||
/* Nothing here yet */
|
|
||||||
}
|
|
||||||
|
|
||||||
struct chip_operations southbridge_ti_pci7420_ops = {
|
struct chip_operations southbridge_ti_pci7420_ops = {
|
||||||
CHIP_NAME("Texas Instruments PCI7420/7620 Cardbus Controller")
|
CHIP_NAME("Texas Instruments PCI7420/7620 Cardbus Controller")
|
||||||
.enable_dev = ti_pci7420_enable_dev,
|
|
||||||
};
|
};
|
||||||
|
|
|
@ -48,13 +48,3 @@ static const struct pci_driver ti_pci7420_driver __pci_driver = {
|
||||||
.vendor = 0x104c,
|
.vendor = 0x104c,
|
||||||
.device = 0x802e,
|
.device = 0x802e,
|
||||||
};
|
};
|
||||||
|
|
||||||
static void ti_pci7420_firewire_enable_dev(struct device *dev)
|
|
||||||
{
|
|
||||||
/* Nothing here yet */
|
|
||||||
}
|
|
||||||
|
|
||||||
struct chip_operations southbridge_ti_pci7420_firewire_ops = {
|
|
||||||
CHIP_NAME("Texas Instruments PCI7420/7620 FireWire (IEEE 1394)")
|
|
||||||
.enable_dev = ti_pci7420_firewire_enable_dev,
|
|
||||||
};
|
|
||||||
|
|
Loading…
Reference in New Issue