mb/google/sarien: Add method to set GPIOs in romstage
Add method variant_romstage_gpio_table() with empty implementation to be used in a subsequent commit for touchscreen power sequencing. Call method in romstage to program any GPIOs that may need to be set. TEST=tested with rest of patch train Change-Id: I11b72a10a4a105385fbcf1d795c020708a7a90d9 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74236 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
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@ -3,6 +3,7 @@
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#include <ec/google/wilco/romstage.h>
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#include <ec/google/wilco/romstage.h>
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#include <soc/cnl_memcfg_init.h>
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#include <soc/cnl_memcfg_init.h>
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#include <soc/romstage.h>
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#include <soc/romstage.h>
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#include <variant/gpio.h>
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static const struct cnl_mb_cfg memcfg = {
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static const struct cnl_mb_cfg memcfg = {
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/* Access memory info through SMBUS. */
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/* Access memory info through SMBUS. */
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@ -44,7 +45,13 @@ static const struct cnl_mb_cfg memcfg = {
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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void mainboard_memory_init_params(FSPM_UPD *memupd)
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{
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{
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const struct pad_config *pads;
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size_t pads_num;
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wilco_ec_romstage_init();
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wilco_ec_romstage_init();
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cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg);
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cannonlake_memcfg_init(&memupd->FspmConfig, &memcfg);
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pads = variant_romstage_gpio_table(&pads_num);
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gpio_configure_pads(pads, pads_num);
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}
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}
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@ -254,6 +254,12 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
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return early_gpio_table;
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return early_gpio_table;
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}
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}
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const struct pad_config *variant_romstage_gpio_table(size_t *num)
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{
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*num = 0;
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return NULL;
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}
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static const struct cros_gpio cros_gpios[] = {
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static const struct cros_gpio cros_gpios[] = {
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CROS_GPIO_REC_AL(GPP_E8, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_REC_AL(GPP_E8, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME),
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@ -14,5 +14,6 @@
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const struct pad_config *variant_gpio_table(size_t *num);
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const struct pad_config *variant_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_romstage_gpio_table(size_t *num);
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#endif
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#endif
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@ -242,6 +242,12 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
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return early_gpio_table;
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return early_gpio_table;
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}
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}
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const struct pad_config *variant_romstage_gpio_table(size_t *num)
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{
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*num = 0;
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return NULL;
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}
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static const struct cros_gpio cros_gpios[] = {
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static const struct cros_gpio cros_gpios[] = {
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CROS_GPIO_REC_AL(GPP_E8, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_REC_AL(GPP_E8, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME),
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CROS_GPIO_WP_AH(GPP_E15, CROS_GPIO_DEVICE_NAME),
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@ -14,5 +14,6 @@
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const struct pad_config *variant_gpio_table(size_t *num);
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const struct pad_config *variant_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_early_gpio_table(size_t *num);
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const struct pad_config *variant_romstage_gpio_table(size_t *num);
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#endif
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#endif
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