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soc/intel: Move c-state resource define 

De-duplicate the MWAIT_RES define. Move it to intel/common/block.

Change-Id: I43903e4f02a549f53101e79f6febd42f2e54f98f
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49802
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marc Jones 2021-01-21 11:32:34 -07:00 committed by Patrick Georgi
parent 3c18186e76
commit 08de06ad6d
8 changed files with 10 additions and 63 deletions
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9
src/soc/intel/alderlake/acpi.c
View File

@ -42,15 +42,6 @@ enum {
NUM_C_STATES NUM_C_STATES
}; };
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
static const acpi_cstate_t cstate_map[NUM_C_STATES] = { static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
[C_STATE_C0] = {}, [C_STATE_C0] = {},
[C_STATE_C1] = { [C_STATE_C1] = {

9
src/soc/intel/cannonlake/acpi.c
View File

@ -42,15 +42,6 @@ enum {
NUM_C_STATES NUM_C_STATES
}; };
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
static const acpi_cstate_t cstate_map[NUM_C_STATES] = { static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
[C_STATE_C0] = {}, [C_STATE_C0] = {},
[C_STATE_C1] = { [C_STATE_C1] = {

10
src/soc/intel/common/block/include/intelblocks/acpi.h
View File

@ -23,6 +23,16 @@ uint32_t soc_read_sci_irq_select(void);
/* Write the scis from soc specific register. */ /* Write the scis from soc specific register. */
void soc_write_sci_irq_select(uint32_t scis); void soc_write_sci_irq_select(uint32_t scis);
/* _CST MWAIT resource used by cstate_map. */
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
/* /*
* get_cstate_map returns a table of processor specific acpi_cstate_t entries * get_cstate_map returns a table of processor specific acpi_cstate_t entries
* and number of entries in the table * and number of entries in the table

9
src/soc/intel/denverton_ns/acpi.c
View File

@ -19,15 +19,6 @@
#include <soc/systemagent.h> #include <soc/systemagent.h>
#include <soc/pci_devs.h> #include <soc/pci_devs.h>
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
#define CSTATE_RES(address_space, width, offset, address) \ #define CSTATE_RES(address_space, width, offset, address) \
{ \ { \
.space_id = address_space, \ .space_id = address_space, \

9
src/soc/intel/elkhartlake/acpi.c
View File

@ -41,15 +41,6 @@ enum {
NUM_C_STATES NUM_C_STATES
}; };
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
static const acpi_cstate_t cstate_map[NUM_C_STATES] = { static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
[C_STATE_C0] = {}, [C_STATE_C0] = {},
[C_STATE_C1] = { [C_STATE_C1] = {

9
src/soc/intel/icelake/acpi.c
View File

@ -38,15 +38,6 @@ enum {
NUM_C_STATES NUM_C_STATES
}; };
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
static const acpi_cstate_t cstate_map[NUM_C_STATES] = { static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
[C_STATE_C0] = {}, [C_STATE_C0] = {},
[C_STATE_C1] = { [C_STATE_C1] = {

9
src/soc/intel/jasperlake/acpi.c
View File

@ -41,15 +41,6 @@ enum {
NUM_C_STATES NUM_C_STATES
}; };
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
static const acpi_cstate_t cstate_map[NUM_C_STATES] = { static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
[C_STATE_C0] = {}, [C_STATE_C0] = {},
[C_STATE_C1] = { [C_STATE_C1] = {

9
src/soc/intel/tigerlake/acpi.c
View File

@ -41,15 +41,6 @@ enum {
NUM_C_STATES NUM_C_STATES
}; };
#define MWAIT_RES(state, sub_state) \
{ \
.addrl = (((state) << 4) | (sub_state)), \
.space_id = ACPI_ADDRESS_SPACE_FIXED, \
.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
}
static const acpi_cstate_t cstate_map[NUM_C_STATES] = { static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
[C_STATE_C0] = {}, [C_STATE_C0] = {},
[C_STATE_C1] = { [C_STATE_C1] = {