soc/intel: Move c-state resource define
De-duplicate the MWAIT_RES define. Move it to intel/common/block. Change-Id: I43903e4f02a549f53101e79f6febd42f2e54f98f Signed-off-by: Marc Jones <marcjones@sysproconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49802 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -42,15 +42,6 @@ enum {
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NUM_C_STATES
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};
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
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[C_STATE_C0] = {},
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[C_STATE_C1] = {
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@ -42,15 +42,6 @@ enum {
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NUM_C_STATES
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};
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
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[C_STATE_C0] = {},
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[C_STATE_C1] = {
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@ -23,6 +23,16 @@ uint32_t soc_read_sci_irq_select(void);
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/* Write the scis from soc specific register. */
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void soc_write_sci_irq_select(uint32_t scis);
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/* _CST MWAIT resource used by cstate_map. */
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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/*
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* get_cstate_map returns a table of processor specific acpi_cstate_t entries
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* and number of entries in the table
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@ -19,15 +19,6 @@
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#include <soc/systemagent.h>
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#include <soc/pci_devs.h>
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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#define CSTATE_RES(address_space, width, offset, address) \
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{ \
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.space_id = address_space, \
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@ -41,15 +41,6 @@ enum {
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NUM_C_STATES
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};
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
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[C_STATE_C0] = {},
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[C_STATE_C1] = {
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@ -38,15 +38,6 @@ enum {
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NUM_C_STATES
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};
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
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[C_STATE_C0] = {},
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[C_STATE_C1] = {
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@ -41,15 +41,6 @@ enum {
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NUM_C_STATES
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};
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
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[C_STATE_C0] = {},
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[C_STATE_C1] = {
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@ -41,15 +41,6 @@ enum {
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NUM_C_STATES
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};
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#define MWAIT_RES(state, sub_state) \
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{ \
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.addrl = (((state) << 4) | (sub_state)), \
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.space_id = ACPI_ADDRESS_SPACE_FIXED, \
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.bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
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.bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
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.access_size = ACPI_FFIXEDHW_FLAG_HW_COORD, \
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}
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static const acpi_cstate_t cstate_map[NUM_C_STATES] = {
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[C_STATE_C0] = {},
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[C_STATE_C1] = {
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