nb/intel/ironlake: Use an `index` variable for resources
Change-Id: Ic587231b57c51db592c1647de138a67c55161e58 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45324 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -95,6 +95,7 @@ static void mc_read_resources(struct device *dev)
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uint32_t tseg_base;
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uint64_t touud;
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uint16_t reg16;
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int index = 3;
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pci_dev_read_resources(dev);
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@ -108,10 +109,10 @@ static void mc_read_resources(struct device *dev)
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printk(BIOS_DEBUG, "TOUUD: 0x%x\n", (unsigned int)touud);
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/* Report the memory regions */
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ram_resource(dev, 3, 0, 640);
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ram_resource(dev, 4, 768, ((tseg_base >> 10) - 768));
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ram_resource(dev, index++, 0, 640);
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ram_resource(dev, index++, 768, ((tseg_base >> 10) - 768));
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mmio_resource(dev, 5, tseg_base >> 10, CONFIG_SMM_TSEG_SIZE >> 10);
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mmio_resource(dev, index++, tseg_base >> 10, CONFIG_SMM_TSEG_SIZE >> 10);
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reg16 = pci_read_config16(pcidev_on_root(0, 0), GGC);
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const int uma_sizes_gtt[16] =
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@ -130,17 +131,17 @@ static void mc_read_resources(struct device *dev)
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pci_read_config32(pcidev_on_root(0, 0), IGD_BASE);
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gtt_base =
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pci_read_config32(pcidev_on_root(0, 0), GTT_BASE);
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mmio_resource(dev, 6, gtt_base >> 10, uma_size_gtt << 10);
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mmio_resource(dev, 7, igd_base >> 10, uma_size_igd << 10);
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mmio_resource(dev, index++, gtt_base >> 10, uma_size_gtt << 10);
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mmio_resource(dev, index++, igd_base >> 10, uma_size_igd << 10);
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if (touud > 4096)
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ram_resource(dev, 8, (4096 << 10), ((touud - 4096) << 10));
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ram_resource(dev, index++, (4096 << 10), ((touud - 4096) << 10));
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/* This memory is not DMA-capable. */
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if (touud >= 8192 - 64)
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bad_ram_resource(dev, 9, 0x1fc000000ULL >> 10, 0x004000000 >> 10);
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bad_ram_resource(dev, index++, 0x1fc000000ULL >> 10, 0x004000000 >> 10);
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add_fixed_resources(dev, 10);
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add_fixed_resources(dev, index);
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}
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static void northbridge_init(struct device *dev)
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