cpu/x86/lapic: Drop read/write_around aliases
Change-Id: Ia3935524e57885ca79586f1f4612020bb05956ab Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55195 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -128,7 +128,7 @@ static int lapic_start_cpu(unsigned long apicid)
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printk(BIOS_ERR, "ESR is 0x%x\n", lapic_read(LAPIC_ESR));
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if (lapic_read(LAPIC_ESR)) {
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printk(BIOS_ERR, "Try to reset ESR\n");
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lapic_write_around(LAPIC_ESR, 0);
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xapic_write_atomic(LAPIC_ESR, 0);
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printk(BIOS_ERR, "ESR is 0x%x\n",
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lapic_read(LAPIC_ESR));
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}
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@ -157,7 +157,7 @@ static int lapic_start_cpu(unsigned long apicid)
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for (j = 1; j <= CONFIG_NUM_IPI_STARTS; j++) {
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printk(BIOS_SPEW, "Sending STARTUP #%d to %lu.\n", j, apicid);
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lapic_read_around(LAPIC_SPIV);
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lapic_read(LAPIC_SPIV);
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lapic_write(LAPIC_ESR, 0);
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lapic_read(LAPIC_ESR);
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printk(BIOS_SPEW, "After apic_write.\n");
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@ -185,7 +185,7 @@ static int lapic_start_cpu(unsigned long apicid)
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* Due to the Pentium erratum 3AP.
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*/
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if (maxlvt > 3) {
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lapic_read_around(LAPIC_SPIV);
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lapic_read(LAPIC_SPIV);
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lapic_write(LAPIC_ESR, 0);
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}
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accept_status = (lapic_read(LAPIC_ESR) & 0xEF);
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@ -40,9 +40,6 @@ static __always_inline int xapic_busy(void)
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return xapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY;
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}
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#define lapic_read_around(x) lapic_read(x)
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#define lapic_write_around(x, y) xapic_write_atomic((x), (y))
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static __always_inline uint32_t x2apic_read(unsigned int reg)
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{
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uint32_t value, index;
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