soc/intel/apollolake: Update memory HOB info save function
SMBIOS memory HOB produced by glk FSP v52_27 has new structure members, which are not available in current apl FSP. New FSP-m header file in https://review.coreboot.org/#/c/20673/ lists new SMBIOS structure members. Break memory HOB save routine into different functions for glk and apl to accomodate new changes. Change-Id: I33c6e4f2842cebbb326b6a05436fa69e3836ffc6 Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com> Reviewed-on: https://review.coreboot.org/20674 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -27,6 +27,11 @@ romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
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romstage-y += lpc_lib.c
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romstage-y += memmap.c
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romstage-y += meminit.c
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ifeq ($(CONFIG_SOC_INTEL_GLK),y)
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romstage-y += meminit_util_glk.c
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else
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romstage-y += meminit_util_apl.c
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endif
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romstage-y += mmap_boot.c
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romstage-y += pmutil.c
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romstage-y += reset.c
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@ -12,11 +12,9 @@
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <console/console.h>
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#include <fsp/util.h>
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#include <memory_info.h>
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#include <soc/intel/common/smbios.h>
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#include <soc/meminit.h>
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#include <stddef.h> /* required for FspmUpd.h */
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#include <fsp/soc_binding.h>
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@ -259,68 +257,6 @@ void meminit_lpddr4_by_sku(FSP_M_CONFIG *cfg,
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cfg->PeriodicRetrainingDisable = sku->disable_periodic_retraining;
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}
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void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
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{
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int channel, dimm, dimm_max, index;
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size_t hob_size;
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const DIMM_INFO *src_dimm;
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struct dimm_info *dest_dimm;
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struct memory_info *mem_info;
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const CHANNEL_INFO *channel_info;
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const FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
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if (mem_sku >= lp4cfg->num_skus) {
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printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",
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mem_sku, lp4cfg->num_skus);
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return;
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}
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memory_info_hob = fsp_find_smbios_memory_info(&hob_size);
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/*
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* Allocate CBMEM area for DIMM information used to populate SMBIOS
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* table 17
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*/
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mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
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if (mem_info == NULL) {
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printk(BIOS_ERR, "CBMEM entry for DIMM info missing\n");
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return;
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}
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memset(mem_info, 0, sizeof(*mem_info));
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/* Describe the first N DIMMs in the system */
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index = 0;
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dimm_max = ARRAY_SIZE(mem_info->dimm);
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for (channel = 0; channel < memory_info_hob->ChannelCount; channel++) {
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if (index >= dimm_max)
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break;
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channel_info = &memory_info_hob->ChannelInfo[channel];
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for (dimm = 0; dimm < channel_info->DimmCount; dimm++) {
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if (index >= dimm_max)
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break;
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src_dimm = &channel_info->DimmInfo[dimm];
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dest_dimm = &mem_info->dimm[index];
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if (!src_dimm->SizeInMb)
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continue;
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/* Populate the DIMM information */
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dimm_info_fill(dest_dimm,
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src_dimm->SizeInMb,
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memory_info_hob->MemoryType,
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memory_info_hob->MemoryFrequencyInMHz,
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channel_info->ChannelId,
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src_dimm->DimmId,
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lp4cfg->skus[mem_sku].part_num,
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strlen(lp4cfg->skus[mem_sku].part_num),
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memory_info_hob->DataWidth);
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index++;
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}
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}
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mem_info->dimm_cnt = index;
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printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
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}
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uint8_t fsp_memory_soc_version(void)
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{
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/* Bump this value when the memory configuration parameters change. */
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@ -0,0 +1,85 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <console/console.h>
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#include <fsp/util.h>
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#include <memory_info.h>
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#include <soc/intel/common/smbios.h>
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#include <soc/meminit.h>
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#include <string.h>
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void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
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{
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int channel, dimm, dimm_max, index;
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size_t hob_size;
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const DIMM_INFO *src_dimm;
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struct dimm_info *dest_dimm;
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struct memory_info *mem_info;
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const CHANNEL_INFO *channel_info;
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const FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
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if (mem_sku >= lp4cfg->num_skus) {
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printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",
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mem_sku, lp4cfg->num_skus);
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return;
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}
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memory_info_hob = fsp_find_smbios_memory_info(&hob_size);
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/*
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* Allocate CBMEM area for DIMM information used to populate SMBIOS
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* table 17
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*/
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mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
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if (mem_info == NULL) {
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printk(BIOS_ERR, "CBMEM entry for DIMM info missing\n");
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return;
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}
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memset(mem_info, 0, sizeof(*mem_info));
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/* Describe the first N DIMMs in the system */
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index = 0;
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dimm_max = ARRAY_SIZE(mem_info->dimm);
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for (channel = 0; channel < memory_info_hob->ChannelCount; channel++) {
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if (index >= dimm_max)
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break;
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channel_info = &memory_info_hob->ChannelInfo[channel];
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for (dimm = 0; dimm < channel_info->DimmCount; dimm++) {
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if (index >= dimm_max)
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break;
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src_dimm = &channel_info->DimmInfo[dimm];
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dest_dimm = &mem_info->dimm[index];
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if (!src_dimm->SizeInMb)
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continue;
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/* Populate the DIMM information */
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dimm_info_fill(dest_dimm,
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src_dimm->SizeInMb,
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memory_info_hob->MemoryType,
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memory_info_hob->MemoryFrequencyInMHz,
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channel_info->ChannelId,
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src_dimm->DimmId,
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lp4cfg->skus[mem_sku].part_num,
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strlen(lp4cfg->skus[mem_sku].part_num),
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memory_info_hob->DataWidth);
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index++;
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}
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}
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mem_info->dimm_cnt = index;
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printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
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}
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@ -0,0 +1,92 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <cbmem.h>
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#include <console/console.h>
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#include <fsp/util.h>
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#include <memory_info.h>
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#include <soc/intel/common/smbios.h>
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#include <soc/meminit.h>
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#include <string.h>
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void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku)
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{
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int channel, dimm, dimm_max, index, node;
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size_t hob_size;
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const DIMM_INFO *src_dimm;
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struct dimm_info *dest_dimm;
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struct memory_info *mem_info;
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const CHANNEL_INFO *channel_info;
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const FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
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const CONTROLLER_INFO *ctrl_info;
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if (mem_sku >= lp4cfg->num_skus) {
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printk(BIOS_ERR, "Too few LPDDR4 SKUs: 0x%zx/0x%zx\n",
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mem_sku, lp4cfg->num_skus);
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return;
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}
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memory_info_hob = fsp_find_smbios_memory_info(&hob_size);
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/*
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* Allocate CBMEM area for DIMM information used to populate SMBIOS
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* table 17
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*/
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mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(*mem_info));
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if (mem_info == NULL) {
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printk(BIOS_ERR, "CBMEM entry for DIMM info missing\n");
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return;
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}
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memset(mem_info, 0, sizeof(*mem_info));
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/* Describe the first N DIMMs in the system */
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index = 0;
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dimm_max = ARRAY_SIZE(mem_info->dimm);
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for (node = 0; node < MAX_NODE_NUM; node++) {
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ctrl_info = &memory_info_hob->Controller[node];
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for (channel = 0; channel < ctrl_info->ChannelCount;
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channel++) {
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if (index >= dimm_max)
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break;
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channel_info = &ctrl_info->ChannelInfo[channel];
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for (dimm = 0; dimm < channel_info->DimmCount; dimm++) {
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if (index >= dimm_max)
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break;
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src_dimm = &channel_info->DimmInfo[dimm];
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dest_dimm = &mem_info->dimm[index];
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if (!src_dimm->DimmCapacity)
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continue;
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/* Populate the DIMM information */
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dimm_info_fill(dest_dimm,
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src_dimm->DimmCapacity,
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memory_info_hob->MemoryType,
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memory_info_hob->ConfiguredMemoryClockSpeed,
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channel_info->ChannelId,
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src_dimm->DimmId,
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lp4cfg->skus[mem_sku].part_num,
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strlen(lp4cfg->skus[mem_sku].part_num),
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memory_info_hob->DataWidth);
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index++;
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}
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}
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}
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mem_info->dimm_cnt = index;
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printk(BIOS_DEBUG, "%d DIMMs found\n", mem_info->dimm_cnt);
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}
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