From 092245dfbbf574cd9a3ea101fd77f6aa010ffd46 Mon Sep 17 00:00:00 2001 From: Marc Jones Date: Fri, 6 Nov 2020 10:45:38 -0700 Subject: [PATCH] mainboard/ocp/tiogapass: Set longer BMC timeout The BMC isn't always ready in 60 seconds if it printing debug output. Give it 90 seconds to finish before timing out in coreboot. Change-Id: I3932d3e8fad067e8971e82b45b499801fc78079f Signed-off-by: Marc Jones Reviewed-on: https://review.coreboot.org/c/coreboot/+/47306 Tested-by: build bot (Jenkins) Reviewed-by: Jay Talbott Reviewed-by: Arthur Heymans Reviewed-by: Javier Galindo --- src/mainboard/ocp/tiogapass/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/ocp/tiogapass/devicetree.cb b/src/mainboard/ocp/tiogapass/devicetree.cb index 33f4090751..008633b1a1 100644 --- a/src/mainboard/ocp/tiogapass/devicetree.cb +++ b/src/mainboard/ocp/tiogapass/devicetree.cb @@ -74,7 +74,7 @@ chip soc/intel/xeon_sp/skx chip drivers/ipmi # BMC KCS device pnp ca2.0 on end register "bmc_i2c_address" = "0x20" - register "bmc_boot_timeout" = "60" + register "bmc_boot_timeout" = "90" end end # Intel Corporation C621 Series Chipset LPC/eSPI Controller device pci 1f.2 on end # Intel Corporation C620 Series Chipset Family Power Management Controller