AMD K8 fam10: Use parent subordinate to track HT enumeration
Change-Id: I930f2beacdc95d0a7edd07db66a1c2e58bb2f3cd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8566 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
This commit is contained in:
parent
ed7bc2c9cf
commit
09705ab724
|
@ -561,7 +561,6 @@ static void amdfam10_scan_chains(device_t dev)
|
|||
unsigned sblink = sysconf.sblk;
|
||||
device_t io_hub = NULL;
|
||||
u32 next_unitid = 0xff;
|
||||
unsigned int max = dev->bus->subordinate;
|
||||
|
||||
nodeid = amdfam10_nodeid(dev);
|
||||
if (nodeid == 0) {
|
||||
|
@ -578,8 +577,6 @@ static void amdfam10_scan_chains(device_t dev)
|
|||
}
|
||||
max = dev->bus->subordinate;
|
||||
}
|
||||
|
||||
dev->bus->subordinate = max;
|
||||
}
|
||||
|
||||
static struct device_operations northbridge_operations = {
|
||||
|
|
|
@ -465,7 +465,6 @@ static void scan_chains(device_t dev)
|
|||
struct bus *link;
|
||||
device_t io_hub = NULL;
|
||||
u32 next_unitid = 0x18;
|
||||
unsigned int max = dev->bus->subordinate;
|
||||
|
||||
nodeid = amdfam15_nodeid(dev);
|
||||
if (nodeid == 0) {
|
||||
|
@ -481,10 +480,7 @@ static void scan_chains(device_t dev)
|
|||
pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7);
|
||||
}
|
||||
}
|
||||
max = dev->bus->subordinate;
|
||||
}
|
||||
|
||||
dev->bus->subordinate = max;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -152,6 +152,15 @@ static void ht_route_link(struct bus *link, scan_state mode)
|
|||
struct bus *parent = link->dev->bus;
|
||||
u32 busses;
|
||||
|
||||
if (mode == HT_ROUTE_SCAN) {
|
||||
if (parent->subordinate == 0)
|
||||
link->secondary = 0;
|
||||
else
|
||||
link->secondary = parent->subordinate + 1;
|
||||
|
||||
link->subordinate = link->secondary;
|
||||
}
|
||||
|
||||
/* Configure the bus numbers for this bridge: the configuration
|
||||
* transactions will not be propagated by the bridge if it is
|
||||
* not correctly configured
|
||||
|
@ -170,9 +179,15 @@ static void ht_route_link(struct bus *link, scan_state mode)
|
|||
}
|
||||
pci_write_config32(link->dev, link->cap + 0x14, busses);
|
||||
|
||||
if (mode == HT_ROUTE_FINAL) {
|
||||
if (CONFIG_HT_CHAIN_DISTRIBUTE)
|
||||
parent->subordinate = ALIGN_UP(link->subordinate, 8) - 1;
|
||||
else
|
||||
parent->subordinate = link->subordinate;
|
||||
}
|
||||
}
|
||||
|
||||
static u32 amdfam10_scan_chain(struct bus *link, u32 max)
|
||||
static void amdfam10_scan_chain(struct bus *link)
|
||||
{
|
||||
unsigned int next_unitid;
|
||||
|
||||
|
@ -180,23 +195,13 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max)
|
|||
* register in function 1.
|
||||
*/
|
||||
if (get_ht_c_index(link) >= 4)
|
||||
return max;
|
||||
return;
|
||||
|
||||
/* Set up the primary, secondary and subordinate bus numbers.
|
||||
* We have no idea how many busses are behind this bridge yet,
|
||||
* so we set the subordinate bus number to 0xff for the moment.
|
||||
*/
|
||||
|
||||
if (max != 0)
|
||||
max++;
|
||||
|
||||
/* One node can have 8 link and segn is the same. */
|
||||
if (CONFIG_HT_CHAIN_DISTRIBUTE)
|
||||
max = ALIGN_UP(max, 8);
|
||||
|
||||
link->secondary = max;
|
||||
link->subordinate = link->secondary;
|
||||
|
||||
ht_route_link(link, HT_ROUTE_SCAN);
|
||||
|
||||
/* set the config map space */
|
||||
|
@ -224,8 +229,6 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max)
|
|||
set_config_map_reg(link);
|
||||
|
||||
store_ht_c_conf_bus(link);
|
||||
|
||||
return link->subordinate;
|
||||
}
|
||||
|
||||
/* Do sb ht chain at first, in case s2885 put sb chain
|
||||
|
@ -269,17 +272,14 @@ static void trim_ht_chain(struct device *dev)
|
|||
static void amdfam10_scan_chains(device_t dev)
|
||||
{
|
||||
struct bus *link;
|
||||
unsigned int max = dev->bus->subordinate;
|
||||
|
||||
/* Do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0 */
|
||||
trim_ht_chain(dev);
|
||||
|
||||
for (link = dev->link_list; link; link = link->next) {
|
||||
if (link->ht_link_up)
|
||||
max = amdfam10_scan_chain(link, max);
|
||||
amdfam10_scan_chain(link);
|
||||
}
|
||||
|
||||
dev->bus->subordinate = max;
|
||||
}
|
||||
|
||||
|
||||
|
|
|
@ -91,6 +91,15 @@ static void ht_route_link(struct bus *link, scan_state mode)
|
|||
struct bus *parent = dev->bus;
|
||||
u32 busses;
|
||||
|
||||
if (mode == HT_ROUTE_SCAN) {
|
||||
if (link->dev->bus->subordinate == 0)
|
||||
link->secondary = 0;
|
||||
else
|
||||
link->secondary = parent->subordinate + 1;
|
||||
|
||||
link->subordinate = link->secondary;
|
||||
}
|
||||
|
||||
/* Configure the bus numbers for this bridge: the configuration
|
||||
* transactions will not be propagated by the bridge if it is
|
||||
* not correctly configured
|
||||
|
@ -109,6 +118,13 @@ static void ht_route_link(struct bus *link, scan_state mode)
|
|||
}
|
||||
pci_write_config32(link->dev, link->cap + 0x14, busses);
|
||||
|
||||
if (mode == HT_ROUTE_FINAL) {
|
||||
/* Second chain will be on 0x40, third 0x80, forth 0xc0. */
|
||||
if (CONFIG_HT_CHAIN_DISTRIBUTE)
|
||||
parent->subordinate = ALIGN_UP(link->subordinate, 0x40) - 1;
|
||||
else
|
||||
parent->subordinate = link->subordinate;
|
||||
}
|
||||
}
|
||||
|
||||
static u32 amdk8_nodeid(device_t dev)
|
||||
|
@ -116,7 +132,7 @@ static u32 amdk8_nodeid(device_t dev)
|
|||
return (dev->path.pci.devfn >> 3) - 0x18;
|
||||
}
|
||||
|
||||
static u32 amdk8_scan_chain(struct bus *link, u32 max)
|
||||
static void amdk8_scan_chain(struct bus *link)
|
||||
{
|
||||
unsigned int next_unitid;
|
||||
int index;
|
||||
|
@ -148,7 +164,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max)
|
|||
* register skip this bus
|
||||
*/
|
||||
if (config_reg > 0xec) {
|
||||
return max;
|
||||
return;
|
||||
}
|
||||
|
||||
/* Set up the primary, secondary and subordinate bus numbers.
|
||||
|
@ -156,16 +172,6 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max)
|
|||
* so we set the subordinate bus number to 0xff for the moment.
|
||||
*/
|
||||
|
||||
if (max != 0)
|
||||
max++;
|
||||
|
||||
/* Second chain will be on 0x40, third 0x80, forth 0xc0. */
|
||||
if (CONFIG_HT_CHAIN_DISTRIBUTE)
|
||||
max = ALIGN_UP(max, 0x40);
|
||||
|
||||
link->secondary = max;
|
||||
link->subordinate = link->secondary;
|
||||
|
||||
ht_route_link(link, HT_ROUTE_SCAN);
|
||||
|
||||
config_busses = f1_read_config32(config_reg);
|
||||
|
@ -199,8 +205,6 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max)
|
|||
|
||||
index = (config_reg-0xe0) >> 2;
|
||||
sysconf.hcdn_reg[index] = link->hcdn_reg;
|
||||
|
||||
return link->subordinate;
|
||||
}
|
||||
|
||||
/* Do sb ht chain at first, in case s2885 put sb chain
|
||||
|
@ -244,16 +248,13 @@ static void trim_ht_chain(struct device *dev)
|
|||
static void amdk8_scan_chains(device_t dev)
|
||||
{
|
||||
struct bus *link;
|
||||
unsigned int max = dev->bus->subordinate;
|
||||
|
||||
trim_ht_chain(dev);
|
||||
|
||||
for (link = dev->link_list; link; link = link->next) {
|
||||
if (link->ht_link_up)
|
||||
max = amdk8_scan_chain(link, max);
|
||||
amdk8_scan_chain(link);
|
||||
}
|
||||
|
||||
dev->bus->subordinate = max;
|
||||
}
|
||||
|
||||
|
||||
|
|
Loading…
Reference in New Issue