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mb/google/dedede: Enable PMC, P2SB and PCH SPI in the devicetree 

BUG=None
TEST=Build and boot the mainboard.

Change-Id: I1aae4adf1c13fd4ff58aa38a877f34e142f320f1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41037
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Karthikeyan Ramasubramanian 2020-05-04 13:36:23 -06:00 committed by Patrick Georgi
parent 4a36cfb625
commit 0985fba370
1 changed files with 3 additions and 3 deletions
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6
src/mainboard/google/dedede/variants/baseboard/devicetree.cb
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@ -289,11 +289,11 @@ chip soc/intel/jasperlake
device pnp 0c09.0 on end device pnp 0c09.0 on end
end end
end # eSPI Interface end # eSPI Interface
device pci 1f.1 off end # P2SB device pci 1f.1 on end # P2SB
device pci 1f.2 off end # Power Management Controller device pci 1f.2 on end # Power Management Controller
device pci 1f.3 off end # Intel HDA/cAVS device pci 1f.3 off end # Intel HDA/cAVS
device pci 1f.4 off end # SMBus device pci 1f.4 off end # SMBus
device pci 1f.5 off end # PCH SPI device pci 1f.5 on end # PCH SPI
device pci 1f.7 off end # Intel Trace Hub device pci 1f.7 off end # Intel Trace Hub
end end
end end