AMD8131: Remove obsolete directory
Change-Id: I875384e55a4a71d1a5c962d128d13356f3befa56 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8335 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -1,7 +1,6 @@
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source src/southbridge/amd/amd8111/Kconfig
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source src/southbridge/amd/amd8131/Kconfig
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source src/southbridge/amd/cs5536/Kconfig
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#source src/southbridge/amd/amd8131-disable/Kconfig
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source src/southbridge/amd/amd8132/Kconfig
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source src/southbridge/amd/amd8151/Kconfig
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source src/southbridge/amd/cs5535/Kconfig
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@ -1,116 +0,0 @@
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/*
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* (C) 2004 Linux Networx
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <pc80/mc146818rtc.h>
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static void amd8131_bus_read_resources(device_t dev)
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{
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return;
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}
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static void amd8131_bus_set_resources(device_t dev)
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{
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#if 0
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pci_bus_read_resources(dev);
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#endif
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return;
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}
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static void amd8131_bus_enable_resources(device_t dev)
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{
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#if 0
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pci_dev_set_resources(dev);
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#endif
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return;
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}
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static void amd8131_bus_init(device_t dev)
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{
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#if 0
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pcix_init(dev);
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#endif
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return;
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}
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static unsigned int amd8131_scan_bus(device_t bus, unsigned int max)
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{
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#if 0
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max = pcix_scan_bridge(bus, max);
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#endif
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return max;
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}
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static void amd8131_enable(device_t dev)
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{
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uint32_t buses;
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uint16_t cr;
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/* Clear all status bits and turn off memory, I/O and master enables. */
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pci_write_config16(dev, PCI_COMMAND, 0x0000);
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pci_write_config16(dev, PCI_STATUS, 0xffff);
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/*
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* Read the existing primary/secondary/subordinate bus
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* number configuration.
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*/
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buses = pci_read_config32(dev, PCI_PRIMARY_BUS);
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/* Configure the bus numbers for this bridge: the configuration
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* transactions will not be propagated by the bridge if it is not
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* correctly configured.
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*/
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buses &= 0xff000000;
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buses |= (((unsigned int) (dev->bus->secondary) << 0) |
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((unsigned int) (dev->bus->secondary) << 8) |
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((unsigned int) (dev->bus->secondary) << 16));
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pci_write_config32(dev, PCI_PRIMARY_BUS, buses);
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}
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static struct device_operations pcix_ops = {
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.read_resources = amd8131_bus_read_resources,
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.set_resources = amd8131_bus_set_resources,
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.enable_resources = amd8131_bus_enable_resources,
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.init = amd8131_bus_init,
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.scan_bus = 0,
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.enable = amd8131_enable,
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};
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static const struct pci_driver pcix_driver __pci_driver = {
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.ops = &pcix_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.device = 0x7450,
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};
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static void ioapic_enable(device_t dev)
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{
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uint32_t value;
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value = pci_read_config32(dev, 0x44);
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if (dev->enabled) {
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value |= ((1 << 1) | (1 << 0));
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} else {
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value &= ~((1 << 1) | (1 << 0));
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}
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pci_write_config32(dev, 0x44, value);
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}
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static struct device_operations ioapic_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = pci_dev_enable_resources,
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.init = 0,
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.scan_bus = 0,
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.enable = ioapic_enable,
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};
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static const struct pci_driver ioapic_driver __pci_driver = {
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.ops = &ioapic_ops,
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.vendor = PCI_VENDOR_ID_AMD,
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.device = 0x7451,
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};
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