inteltool: Add option to show differences in GPIO setup
This adds an option -G, --gpio-diffs to inteltool, which shows GPIO settings that differ from platform defaults. For differing registers, the current, the default, and an xor of the default and the current value is printed. A follow-up commit will add defaults for the Cougar/Panther Point platform controller hubs. If you specify both, -g and -G on the command line, all GPIO registers will be printed interleaved with the diff. Here's a preview: $ ./inteltool -G CPU: Processor Type: 0, Family 6, Model 3a, Stepping 9 Northbridge: 8086:0150 (unknown) Southbridge: 8086:1e4a (H77) ========== GPIO DIFFS =========== GPIOBASE = 0x0500 (IO) gpiobase+0x0000: 0xb96ba1fb (GPIO_USE_SEL) gpiobase+0x0000: 0xb96ba1ff (GPIO_USE_SEL) DEFAULT gpiobase+0x0000: 0x00000004 (GPIO_USE_SEL) DIFF gpiobase+0x0004: 0x06ff6efb (GP_IO_SEL) gpiobase+0x0004: 0xeeff6eff (GP_IO_SEL) DEFAULT gpiobase+0x0004: 0xe8000004 (GP_IO_SEL) DIFF gpiobase+0x000c: 0xe1f17f7e (GP_LVL) gpiobase+0x000c: 0x02fe0100 (GP_LVL) DEFAULT gpiobase+0x000c: 0xe30f7e7e (GP_LVL) DIFF gpiobase+0x002c: 0x00002000 (GPI_INV) gpiobase+0x002c: 0x00000000 (GPI_INV) DEFAULT gpiobase+0x002c: 0x00002000 (GPI_INV) DIFF gpiobase+0x0030: 0x0aff70ff (GPIO_USE_SEL2) gpiobase+0x0030: 0x020300ff (GPIO_USE_SEL2) DEFAULT gpiobase+0x0030: 0x08fc7000 (GPIO_USE_SEL2) DIFF gpiobase+0x0034: 0x15038ff2 (GP_IO_SEL2) gpiobase+0x0034: 0x1f57fff4 (GP_IO_SEL2) DEFAULT gpiobase+0x0034: 0x0a547006 (GP_IO_SEL2) DIFF gpiobase+0x0038: 0xb65e7f4f (GP_LVL2) gpiobase+0x0038: 0xa4aa0007 (GP_LVL2) DEFAULT gpiobase+0x0038: 0x12f47f48 (GP_LVL2) DIFF gpiobase+0x0040: 0x000001f3 (GPIO_USE_SEL3) gpiobase+0x0040: 0x00000130 (GPIO_USE_SEL3) DEFAULT gpiobase+0x0040: 0x000000c3 (GPIO_USE_SEL3) DIFF gpiobase+0x0044: 0x00000ef3 (GPIO_SEL3) gpiobase+0x0044: 0x00000ff0 (GPIO_SEL3) DEFAULT gpiobase+0x0044: 0x00000103 (GPIO_SEL3) DIFF gpiobase+0x0048: 0x00000dfc (GPIO_LVL3) gpiobase+0x0048: 0x000000c0 (GPIO_LVL3) DEFAULT gpiobase+0x0048: 0x00000d3c (GPIO_LVL3) DIFF gpiobase+0x0060: 0x00000000 (GP_RST_SEL1) gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DEFAULT gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DIFF $ ./inteltool -gG CPU: Processor Type: 0, Family 6, Model 3a, Stepping 9 Northbridge: 8086:0150 (unknown) Southbridge: 8086:1e4a (H77) ============= GPIOS ============= GPIOBASE = 0x0500 (IO) gpiobase+0x0000: 0xb96ba1fb (GPIO_USE_SEL) gpiobase+0x0000: 0xb96ba1ff (GPIO_USE_SEL) DEFAULT gpiobase+0x0000: 0x00000004 (GPIO_USE_SEL) DIFF gpiobase+0x0004: 0x06ff6efb (GP_IO_SEL) gpiobase+0x0004: 0xeeff6eff (GP_IO_SEL) DEFAULT gpiobase+0x0004: 0xe8000004 (GP_IO_SEL) DIFF gpiobase+0x0008: 0x00000000 (RESERVED) gpiobase+0x000c: 0xe1f17f7e (GP_LVL) gpiobase+0x000c: 0x02fe0100 (GP_LVL) DEFAULT gpiobase+0x000c: 0xe30f7e7e (GP_LVL) DIFF gpiobase+0x0010: 0x00000000 (RESERVED) gpiobase+0x0014: 0x00000000 (RESERVED) gpiobase+0x0018: 0x00040000 (GPO_BLINK) gpiobase+0x001c: 0x00000000 (GP_SER_BLINK) gpiobase+0x0020: 0x00080000 (GP_SB_CMDSTS) gpiobase+0x0024: 0x00000000 (GP_SB_DATA) gpiobase+0x0028: 0x0000 (GPI_NMI_EN) gpiobase+0x002a: 0x0000 (GPI_NMI_STS) gpiobase+0x002c: 0x00002000 (GPI_INV) gpiobase+0x002c: 0x00000000 (GPI_INV) DEFAULT gpiobase+0x002c: 0x00002000 (GPI_INV) DIFF gpiobase+0x0030: 0x0aff70ff (GPIO_USE_SEL2) gpiobase+0x0030: 0x020300ff (GPIO_USE_SEL2) DEFAULT gpiobase+0x0030: 0x08fc7000 (GPIO_USE_SEL2) DIFF gpiobase+0x0034: 0x15038ff2 (GP_IO_SEL2) gpiobase+0x0034: 0x1f57fff4 (GP_IO_SEL2) DEFAULT gpiobase+0x0034: 0x0a547006 (GP_IO_SEL2) DIFF gpiobase+0x0038: 0xb65e7f4f (GP_LVL2) gpiobase+0x0038: 0xa4aa0007 (GP_LVL2) DEFAULT gpiobase+0x0038: 0x12f47f48 (GP_LVL2) DIFF gpiobase+0x003c: 0x00000000 (RESERVED) gpiobase+0x0040: 0x000001f3 (GPIO_USE_SEL3) gpiobase+0x0040: 0x00000130 (GPIO_USE_SEL3) DEFAULT gpiobase+0x0040: 0x000000c3 (GPIO_USE_SEL3) DIFF gpiobase+0x0044: 0x00000ef3 (GPIO_SEL3) gpiobase+0x0044: 0x00000ff0 (GPIO_SEL3) DEFAULT gpiobase+0x0044: 0x00000103 (GPIO_SEL3) DIFF gpiobase+0x0048: 0x00000dfc (GPIO_LVL3) gpiobase+0x0048: 0x000000c0 (GPIO_LVL3) DEFAULT gpiobase+0x0048: 0x00000d3c (GPIO_LVL3) DIFF gpiobase+0x004c: 0x00000000 (RESERVED) gpiobase+0x0050: 0x00000000 (RESERVED) gpiobase+0x0054: 0x00000000 (RESERVED) gpiobase+0x0058: 0x00000000 (RESERVED) gpiobase+0x005c: 0x00000000 (RESERVED) gpiobase+0x0060: 0x00000000 (GP_RST_SEL1) gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DEFAULT gpiobase+0x0060: 0x01000000 (GP_RST_SEL1) DIFF gpiobase+0x0064: 0x00000000 (GP_RST_SEL2) gpiobase+0x0068: 0x00000000 (GP_RST_SEL3) gpiobase+0x006c: 0x00000000 (RESERVED) gpiobase+0x0070: 0x00000000 (RESERVED) gpiobase+0x0074: 0x00000000 (RESERVED) gpiobase+0x0078: 0x00000000 (RESERVED) gpiobase+0x007c: 0x00000000 (RESERVED) Change-Id: Ic77474c4bc0871e95103ddecd9f6a9406c8f016d Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: http://review.coreboot.org/3000 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
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@ -20,6 +20,8 @@
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#include <stdio.h>
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#include <stdio.h>
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#include "inteltool.h"
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#include "inteltool.h"
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typedef struct { uint16_t addr; uint32_t def; } gpio_default_t;
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static const io_register_t ich0_gpio_registers[] = {
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static const io_register_t ich0_gpio_registers[] = {
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{ 0x00, 4, "GPIO_USE_SEL" },
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{ 0x00, 4, "GPIO_USE_SEL" },
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{ 0x04, 4, "GP_IO_SEL" },
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{ 0x04, 4, "GP_IO_SEL" },
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@ -256,14 +258,79 @@ static const io_register_t pch_gpio_registers[] = {
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{ 0x78, 4, "RESERVED" },
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{ 0x78, 4, "RESERVED" },
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{ 0x7c, 4, "RESERVED" },
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{ 0x7c, 4, "RESERVED" },
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};
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};
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static uint16_t gpiobase;
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int print_gpios(struct pci_dev *sb)
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static void print_reg(const io_register_t *const reg)
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{
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{
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int i, size;
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switch (reg->size) {
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uint16_t gpiobase;
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case 4:
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const io_register_t *gpio_registers;
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printf("gpiobase+0x%04x: 0x%08x (%s)\n",
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reg->addr, inl(gpiobase+reg->addr), reg->name);
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break;
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case 2:
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printf("gpiobase+0x%04x: 0x%04x (%s)\n",
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reg->addr, inw(gpiobase+reg->addr), reg->name);
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break;
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case 1:
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printf("gpiobase+0x%04x: 0x%02x (%s)\n",
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reg->addr, inb(gpiobase+reg->addr), reg->name);
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break;
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}
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}
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printf("\n============= GPIOS =============\n\n");
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static uint32_t get_diff(const io_register_t *const reg, const uint32_t def)
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{
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uint32_t gpio_diff = 0;
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switch (reg->size) {
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case 4:
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gpio_diff = def ^ inl(gpiobase+reg->addr);
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break;
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case 2:
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gpio_diff = (uint16_t)def ^ inw(gpiobase+reg->addr);
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break;
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case 1:
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gpio_diff = (uint8_t)def ^ inb(gpiobase+reg->addr);
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break;
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}
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return gpio_diff;
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}
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static void print_diff(const io_register_t *const reg,
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const uint32_t def, const uint32_t diff)
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{
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switch (reg->size) {
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case 4:
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printf("gpiobase+0x%04x: 0x%08x (%s) DEFAULT\n",
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reg->addr, def, reg->name);
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printf("gpiobase+0x%04x: 0x%08x (%s) DIFF\n",
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reg->addr, diff, reg->name);
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break;
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case 2:
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printf("gpiobase+0x%04x: 0x%04x (%s) DEFAULT\n",
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reg->addr, def, reg->name);
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printf("gpiobase+0x%04x: 0x%04x (%s) DIFF\n",
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reg->addr, diff, reg->name);
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break;
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case 1:
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printf("gpiobase+0x%04x: 0x%02x (%s) DEFAULT\n",
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reg->addr, def, reg->name);
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printf("gpiobase+0x%04x: 0x%02x (%s) DIFF\n",
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reg->addr, diff, reg->name);
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break;
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}
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}
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int print_gpios(struct pci_dev *sb, int show_all, int show_diffs)
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{
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int i, j, size, defaults_size = 0;
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const io_register_t *gpio_registers;
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const gpio_default_t *gpio_defaults;
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uint32_t gpio_diff;
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if (show_diffs && !show_all)
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printf("\n========== GPIO DIFFS ===========\n\n");
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else
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printf("\n============= GPIOS =============\n\n");
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switch (sb->device_id) {
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switch (sb->device_id) {
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case PCI_DEVICE_ID_INTEL_Z68:
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case PCI_DEVICE_ID_INTEL_Z68:
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@ -376,26 +443,25 @@ int print_gpios(struct pci_dev *sb)
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printf("GPIOBASE = 0x%04x (IO)\n\n", gpiobase);
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printf("GPIOBASE = 0x%04x (IO)\n\n", gpiobase);
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j = 0;
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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switch (gpio_registers[i].size) {
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if (show_all)
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case 4:
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print_reg(&gpio_registers[i]);
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printf("gpiobase+0x%04x: 0x%08x (%s)\n",
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gpio_registers[i].addr,
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if (show_diffs &&
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inl(gpiobase+gpio_registers[i].addr),
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(j < defaults_size) &&
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gpio_registers[i].name);
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(gpio_defaults[j].addr == gpio_registers[i].addr)) {
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break;
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gpio_diff = get_diff(&gpio_registers[i],
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case 2:
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gpio_defaults[j].def);
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printf("gpiobase+0x%04x: 0x%04x (%s)\n",
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if (gpio_diff) {
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gpio_registers[i].addr,
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if (!show_all)
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inw(gpiobase+gpio_registers[i].addr),
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print_reg(&gpio_registers[i]);
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gpio_registers[i].name);
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print_diff(&gpio_registers[i],
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break;
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gpio_defaults[j].def, gpio_diff);
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case 1:
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if (!show_all)
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printf("gpiobase+0x%04x: 0x%02x (%s)\n",
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printf("\n");
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gpio_registers[i].addr,
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}
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inb(gpiobase+gpio_registers[i].addr),
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j++;
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gpio_registers[i].name);
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break;
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}
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}
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}
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}
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@ -197,11 +197,12 @@ void print_version(void)
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void print_usage(const char *name)
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void print_usage(const char *name)
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{
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{
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printf("usage: %s [-vh?grpmedPMa]\n", name);
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printf("usage: %s [-vh?gGrpmedPMa]\n", name);
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printf("\n"
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printf("\n"
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" -v | --version: print the version\n"
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" -v | --version: print the version\n"
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" -h | --help: print this help\n\n"
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" -h | --help: print this help\n\n"
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" -g | --gpio: dump soutbridge GPIO registers\n"
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" -g | --gpio: dump soutbridge GPIO registers\n"
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" -G | --gpio-diffs: show GPIO differences from defaults\n"
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" -r | --rcba: dump soutbridge RCBA registers\n"
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" -r | --rcba: dump soutbridge RCBA registers\n"
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" -p | --pmbase: dump soutbridge Power Management registers\n\n"
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" -p | --pmbase: dump soutbridge Power Management registers\n\n"
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" -m | --mchbar: dump northbridge Memory Controller registers\n"
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" -m | --mchbar: dump northbridge Memory Controller registers\n"
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@ -227,11 +228,13 @@ int main(int argc, char *argv[])
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int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;
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int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0;
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int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;
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int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0;
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int dump_pciexbar = 0, dump_coremsrs = 0, dump_ambs = 0;
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int dump_pciexbar = 0, dump_coremsrs = 0, dump_ambs = 0;
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int show_gpio_diffs = 0;
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static struct option long_options[] = {
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static struct option long_options[] = {
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{"version", 0, 0, 'v'},
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{"version", 0, 0, 'v'},
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{"help", 0, 0, 'h'},
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{"help", 0, 0, 'h'},
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{"gpios", 0, 0, 'g'},
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{"gpios", 0, 0, 'g'},
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{"gpio-diffs", 0, 0, 'G'},
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{"mchbar", 0, 0, 'm'},
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{"mchbar", 0, 0, 'm'},
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{"rcba", 0, 0, 'r'},
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{"rcba", 0, 0, 'r'},
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{"pmbase", 0, 0, 'p'},
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{"pmbase", 0, 0, 'p'},
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{0, 0, 0, 0}
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{0, 0, 0, 0}
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};
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};
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while ((opt = getopt_long(argc, argv, "vh?grpmedPMaA",
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while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaA",
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long_options, &option_index)) != EOF) {
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long_options, &option_index)) != EOF) {
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switch (opt) {
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switch (opt) {
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case 'v':
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case 'v':
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@ -254,6 +257,9 @@ int main(int argc, char *argv[])
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case 'g':
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case 'g':
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dump_gpios = 1;
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dump_gpios = 1;
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break;
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break;
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case 'G':
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show_gpio_diffs = 1;
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break;
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case 'm':
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case 'm':
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dump_mchbar = 1;
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dump_mchbar = 1;
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break;
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break;
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@ -277,6 +283,7 @@ int main(int argc, char *argv[])
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break;
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break;
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case 'a':
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case 'a':
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dump_gpios = 1;
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dump_gpios = 1;
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show_gpio_diffs = 1;
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dump_mchbar = 1;
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dump_mchbar = 1;
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dump_rcba = 1;
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dump_rcba = 1;
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dump_pmbase = 1;
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dump_pmbase = 1;
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@ -393,7 +400,10 @@ int main(int argc, char *argv[])
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/* Now do the deed */
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/* Now do the deed */
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if (dump_gpios) {
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if (dump_gpios) {
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print_gpios(sb);
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print_gpios(sb, 1, show_gpio_diffs);
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printf("\n\n");
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} else if (show_gpio_diffs) {
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print_gpios(sb, 0, show_gpio_diffs);
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printf("\n\n");
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printf("\n\n");
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}
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}
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int print_mchbar(struct pci_dev *nb, struct pci_access *pacc);
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int print_mchbar(struct pci_dev *nb, struct pci_access *pacc);
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int print_pmbase(struct pci_dev *sb, struct pci_access *pacc);
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int print_pmbase(struct pci_dev *sb, struct pci_access *pacc);
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int print_rcba(struct pci_dev *sb);
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int print_rcba(struct pci_dev *sb);
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int print_gpios(struct pci_dev *sb);
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int print_gpios(struct pci_dev *sb, int show_all, int show_diffs);
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int print_epbar(struct pci_dev *nb);
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int print_epbar(struct pci_dev *nb);
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int print_dmibar(struct pci_dev *nb);
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int print_dmibar(struct pci_dev *nb);
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int print_pciexbar(struct pci_dev *nb);
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int print_pciexbar(struct pci_dev *nb);
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