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soc/intel/common: Add function to wait for CSE to enter Soft Temp Disable mode 

Below helper function is added:
  cse_wait_com_soft_temp_disable() - It polls for CSE's operation mode
 'Soft Temporary Disable'. CSE enters this mode when it boots from
  RO(BP1) partition. The function must be called after resetting CSE to
  wait for CSE to enter 'Soft Temporary Disable' Mode.

BUG=b:145809764

Change-Id: Ibdcf01f31b0310932b8e834ae83144f8a67f1fef
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36786
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
This commit is contained in:
Sridhar Siricilla 2019-11-12 23:35:50 +05:30 committed by Patrick Georgi
parent 206905c309
commit 09ea37172e
2 changed files with 28 additions and 0 deletions
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23
src/soc/intel/common/block/cse/cse.c
View File

@ -68,6 +68,9 @@
#define MEI_HDR_CSE_ADDR_START 0 #define MEI_HDR_CSE_ADDR_START 0
#define MEI_HDR_CSE_ADDR (((1 << 8) - 1) << MEI_HDR_CSE_ADDR_START) #define MEI_HDR_CSE_ADDR (((1 << 8) - 1) << MEI_HDR_CSE_ADDR_START)
/* Wait up to 5 seconds for CSE to boot from RO(BP1) */
#define CSE_DELAY_BOOT_TO_RO (5 * 1000)
static struct cse_device { static struct cse_device {
uintptr_t sec_bar; uintptr_t sec_bar;
} cse; } cse;
@ -304,6 +307,26 @@ uint8_t cse_wait_sec_override_mode(void)
return 1; return 1;
} }
/*
* Polls for CSE's current operation mode 'Soft Temporary Disable'.
* The CSE enters the current operation mode when it boots from RO(BP1).
*/
uint8_t cse_wait_com_soft_temp_disable(void)
{
struct stopwatch sw;
stopwatch_init_msecs_expire(&sw, CSE_DELAY_BOOT_TO_RO);
while (!cse_is_hfs1_com_soft_temp_disable()) {
udelay(HECI_DELAY);
if (stopwatch_expired(&sw)) {
printk(BIOS_ERR, "HECI: Timed out waiting for CSE to boot from RO!\n");
return 0;
}
}
printk(BIOS_SPEW, "HECI: CSE took %lu ms to boot from RO\n",
stopwatch_duration_msecs(&sw));
return 1;
}
static int wait_heci_ready(void) static int wait_heci_ready(void)
{ {
struct stopwatch sw; struct stopwatch sw;

5
src/soc/intel/common/block/include/intelblocks/cse.h
View File

@ -192,4 +192,9 @@ bool cse_is_hfs1_com_soft_temp_disable(void);
*/ */
bool cse_is_hfs3_fw_sku_custom(void); bool cse_is_hfs3_fw_sku_custom(void);
/*
* Polls for CSE's current operation mode 'Soft Temp Disable'.
* Returns 0 on failure and 1 on success.
*/
uint8_t cse_wait_com_soft_temp_disable(void);
#endif // SOC_INTEL_COMMON_CSE_H #endif // SOC_INTEL_COMMON_CSE_H