From 09f7303518c796d7633eb996dfa18ecb26fd6260 Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Fri, 17 Dec 2021 01:50:05 +0100
Subject: [PATCH] soc/amd/common/block/acpimmio/print_reset_status: add missing
 status bit

Both the Picasso PPR #55570 Rev 3.18 and the Cezanne PPR #56569 Rev 3.03
define bit 9 of the PM_RST_STATUS register as internal Thermal Trip
reset status bit.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ida8b13fe62b16c18fc9924520b83220e73eca624
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60184
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
---
 src/soc/amd/common/block/acpimmio/print_reset_status.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/soc/amd/common/block/acpimmio/print_reset_status.c b/src/soc/amd/common/block/acpimmio/print_reset_status.c
index 3825753f84..309401e420 100644
--- a/src/soc/amd/common/block/acpimmio/print_reset_status.c
+++ b/src/soc/amd/common/block/acpimmio/print_reset_status.c
@@ -33,6 +33,7 @@ void fch_print_pmxc0_status(void)
 		[3] = "ThermalTripFromTemp",
 		[4] = "RemotePowerDownFromASF",
 		[5] = "ShutDownFan0",
+		[9] = "InternalThermalTrip",
 		[16] = "UserRst",
 		[17] = "SoftPciRst",
 		[18] = "DoInit",