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sb/intel/lynxpoint: Make the finalise handler common 

The ASRock H81M-HDS doesn't implement a finalise handler. To fix
this, and reduce code duplication in the process, make a common
implementation. There should be no functional change to boards with
existing finalise handlers, since the code is identical among them and
the new, common implementation.

Tested on an ASRock H81M-HDS. The finalise handler works.

Change-Id: I13b581a2219288019a4e0c9e618db3ac7c3c15ab
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/29975
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Tristan Corrick 2018-11-30 22:53:01 +13:00 committed by Patrick Georgi
parent f39e0f9318
commit 09fc6342d2
4 changed files with 15 additions and 60 deletions
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23
src/mainboard/google/beltino/smihandler.c
View File

@ -27,29 +27,6 @@
#include <superio/ite/it8772f/it8772f.h>
#include "onboard.h"
static int mainboard_finalized = 0;
int mainboard_smi_apmc(u8 apmc)
{
switch (apmc) {
case APM_CNT_FINALIZE:
if (mainboard_finalized) {
printk(BIOS_DEBUG, "SMI#: Already finalized\n");
return 0;
}
intel_pch_finalize_smm();
intel_northbridge_haswell_finalize_smm();
intel_cpu_haswell_finalize_smm();
mainboard_finalized = 1;
break;
default:
break;
}
return 0;
}
void mainboard_smi_sleep(u8 slp_typ)
{
switch (slp_typ) {

15
src/mainboard/google/slippy/smihandler.c
View File

@ -119,24 +119,9 @@ void mainboard_smi_sleep(u8 slp_typ)
while (google_chromeec_get_event() != 0);
}
static int mainboard_finalized = 0;
int mainboard_smi_apmc(u8 apmc)
{
switch (apmc) {
case APM_CNT_FINALIZE:
if (mainboard_finalized) {
printk(BIOS_DEBUG, "SMI#: Already finalized\n");
return 0;
}
intel_pch_finalize_smm();
intel_northbridge_haswell_finalize_smm();
intel_cpu_haswell_finalize_smm();
mainboard_finalized = 1;
break;
case APM_CNT_ACPI_ENABLE:
google_chromeec_set_smi_mask(0);
/* Clear all pending events */

22
src/mainboard/intel/baskingridge/mainboard_smi.c
View File

@ -46,25 +46,3 @@ void mainboard_smi_sleep(u8 slp_typ)
break;
}
}
static int mainboard_finalized = 0;
int mainboard_smi_apmc(u8 apmc)
{
switch (apmc) {
case APM_CNT_FINALIZE:
if (mainboard_finalized) {
printk(BIOS_DEBUG, "SMI#: Already finalized\n");
return 0;
}
intel_pch_finalize_smm();
intel_northbridge_haswell_finalize_smm();
intel_cpu_haswell_finalize_smm();
mainboard_finalized = 1;
break;
}
return 0;
}

15
src/southbridge/intel/lynxpoint/smihandler.c
View File

@ -25,6 +25,8 @@
#include <elog.h>
#include <halt.h>
#include <pc80/mc146818rtc.h>
#include <northbridge/intel/haswell/haswell.h>
#include <cpu/intel/haswell/haswell.h>
#include "pch.h"
#include "nvs.h"
@ -270,11 +272,24 @@ static void southbridge_smi_apmc(void)
{
u8 reg8;
em64t101_smm_state_save_area_t *state;
static int chipset_finalized = 0;
/* Emulate B2 register as the FADT / Linux expects it */
reg8 = inb(APM_CNT);
switch (reg8) {
case APM_CNT_FINALIZE:
if (chipset_finalized) {
printk(BIOS_DEBUG, "SMI#: Already finalized\n");
return;
}
intel_pch_finalize_smm();
intel_northbridge_haswell_finalize_smm();
intel_cpu_haswell_finalize_smm();
chipset_finalized = 1;
break;
case APM_CNT_CST_CONTROL:
/* Calling this function seems to cause
* some kind of race condition in Linux