rockchip: refactor to sharing code among similar SOCs

Upcoming designs are based on similar SOCs, this patch moves code
which can be reused into a common directory under soc/rockchip.

Changing spi.h to include stdder.h, as this is were check_member() is
defined, this becomes necessary later when the new SOC code is added.

Renaming UART driver private functions not to be bound to any
particular SOC.

BUG=none
BRANCH=none
TEST=the refactored code works fine on the new platform (with the rest
     of the patches applied).

Change-Id: I39a505aecda8849daa58a8eca0e44a5243664423
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f63f2582042ac115481207ddf329ea2e3260e55e
Original-Change-Id: I3a1139305354d460492b25a45f3da315a9a0b49e
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/335408
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14235
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/soc/rockchip/common/include/soc/i2c.h

@@ -13,11 +13,11 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __SOC_ROCKCHIP_RK3288_I2C_H__
+#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_I2C_H
-#define __SOC_ROCKCHIP_RK3288_I2C_H__
+#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_I2C_H
 
 void i2c_init(unsigned int bus, unsigned int hz);
 void software_i2c_attach(unsigned bus);
 void software_i2c_detach(unsigned bus);
 
-#endif
+#endif  /* ! __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_I2C_H */

src/soc/rockchip/common/include/soc/pwm.h

@@ -13,9 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __SOC_ROCKCHIP_RK3288_PWM_H__
+#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_PWM_H
-#define __SOC_ROCKCHIP_RK3288_PWM_H__
+#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_PWM_H
 
 void pwm_init(u32 id, u32 period_ns, u32 duty_ns);
 
-#endif
+#endif  /* ! __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_PWM_H */

src/soc/rockchip/common/include/soc/rk808.h

@@ -13,11 +13,11 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __SOC_ROCKCHIP_RK3288_PMIC_H__
+#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_RK808_H
-#define __SOC_ROCKCHIP_RK3288_PMIC_H__
+#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_RK808_H
 
 void rk808_configure_switch(int sw, int enabled);
 void rk808_configure_ldo(int ldo, int millivolts);
 void rk808_configure_buck(int buck, int millivolts);
 
-#endif
+#endif  /* ! __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_RK808_H */

src/soc/rockchip/common/include/soc/soc.h

@@ -13,8 +13,8 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __SOC_ROCKCHIP_RK3288_CPU_H__
+#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SOC_H
-#define __SOC_ROCKCHIP_RK3288_CPU_H__
+#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SOC_H
 
 #include <arch/io.h>
 #include <symbols.h>
@@ -23,4 +23,4 @@
 #define RK_SETBITS(set) RK_CLRSETBITS(0, set)
 #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0)
 
-#endif
+#endif  /* ! __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SOC_H */

src/soc/rockchip/common/include/soc/spi.h

@@ -13,12 +13,12 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __SOC_ROCKCHIP_RK3288_SPI_H__
+#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SPI_H
-#define __SOC_ROCKCHIP_RK3288_SPI_H__
+#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SPI_H
 
 /* This driver serves as a CBFS media source. */
 #include <spi-generic.h>
-#include <stdint.h>
+#include <stddef.h>
 
 struct rockchip_spi {
 	u32  ctrlr0;
@@ -192,4 +192,4 @@ check_member(rockchip_spi, rxdr, 0x800);
 
 void rockchip_spi_init(unsigned int bus, unsigned int speed_hz);
 
-#endif
+#endif  /* ! __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_SPI_H */

src/soc/rockchip/common/include/soc/tsadc.h

@@ -13,9 +13,9 @@
  * GNU General Public License for more details.
  */
 
-#ifndef __SOC_ROCKCHIP_RK3288_TSADC_H__
+#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_TSADC_H
-#define __SOC_ROCKCHIP_RK3288_TSADC_H__
+#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_TSADC_H
 
 void tsadc_init(void);
 
-#endif
+#endif  /* ! __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_TSADC_H */

src/soc/rockchip/common/uart.c

@@ -27,7 +27,7 @@
  * This driver can be replaced once the IO calls are sorted.
  */
 
-struct rk3288_uart {
+struct rk_uart {
 	union {
 		uint32_t thr; /* Transmit holding register. */
 		uint32_t rbr; /* Receive buffer register. */
@@ -70,13 +70,13 @@ struct rk3288_uart {
 } __attribute__ ((packed));
 
 
-static struct rk3288_uart * const uart_ptr =
+static struct rk_uart * const uart_ptr =
 	(void *)CONFIG_CONSOLE_SERIAL_UART_ADDRESS;
 
-static void rk3288_uart_tx_flush(void);
+static void rk_uart_tx_flush(void);
-static int rk3288_uart_tst_byte(void);
+static int rk_uart_tst_byte(void);
 
-static void rk3288_uart_init(void)
+static void rk_uart_init(void)
 {
 	/* FIXME: Use a hardcoded divisor for now.
 	 * uint16_t divisor = (u16) uart_baudrate_divisor(default_baudrate(),
@@ -85,7 +85,7 @@ static void rk3288_uart_init(void)
 	const unsigned divisor = 13;
 	const uint8_t line_config = UART8250_LCR_WLS_8; // 8n1
 
-	rk3288_uart_tx_flush();
+	rk_uart_tx_flush();
 
 	// Disable interrupts.
 	write32(&uart_ptr->ier, 0);
@@ -103,25 +103,25 @@ static void rk3288_uart_init(void)
 		UART8250_FCR_CLEAR_RCVR | UART8250_FCR_CLEAR_XMIT);
 }
 
-static void rk3288_uart_tx_byte(unsigned char data)
+static void rk_uart_tx_byte(unsigned char data)
 {
 	while (!(read32(&uart_ptr->lsr) & UART8250_LSR_THRE));
 	write32(&uart_ptr->thr, data);
 }
 
-static void rk3288_uart_tx_flush(void)
+static void rk_uart_tx_flush(void)
 {
 	while (!(read32(&uart_ptr->lsr) & UART8250_LSR_TEMT));
 }
 
-static unsigned char rk3288_uart_rx_byte(void)
+static unsigned char rk_uart_rx_byte(void)
 {
-	if (!rk3288_uart_tst_byte())
+	if (!rk_uart_tst_byte())
 		return 0;
 	return read32(&uart_ptr->rbr);
 }
 
-static int rk3288_uart_tst_byte(void)
+static int rk_uart_tst_byte(void)
 {
 	return (read32(&uart_ptr->lsr) & UART8250_LSR_DR) == UART8250_LSR_DR;
 }
@@ -130,22 +130,22 @@ static int rk3288_uart_tst_byte(void)
 
 void uart_init(int idx)
 {
-	rk3288_uart_init();
+	rk_uart_init();
 }
 
 unsigned char uart_rx_byte(int idx)
 {
-	return rk3288_uart_rx_byte();
+	return rk_uart_rx_byte();
 }
 
 void uart_tx_byte(int idx, unsigned char data)
 {
-	rk3288_uart_tx_byte(data);
+	rk_uart_tx_byte(data);
 }
 
 void uart_tx_flush(int idx)
 {
-	rk3288_uart_tx_flush();
+	rk_uart_tx_flush();
 }
 
 #ifndef __PRE_RAM__

src/soc/rockchip/rk3288/Makefile.inc

@@ -18,58 +18,59 @@ ifeq ($(CONFIG_SOC_ROCKCHIP_RK3288),y)
 IDBTOOL = util/rockchip/make_idb.py
 
 bootblock-y += bootblock.c
-bootblock-y += cbmem.c
+bootblock-y += ../common/cbmem.c
 ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
-bootblock-$(CONFIG_DRIVERS_UART) += uart.c
+bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 endif
 bootblock-y += timer.c
 bootblock-y += clock.c
-bootblock-y += spi.c
+bootblock-y += ../common/spi.c
 bootblock-y += gpio.c
 bootblock-y += i2c.c
 bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
-bootblock-y += rk808.c
+bootblock-y += ../common/rk808.c
 
-verstage-y += spi.c
+verstage-y += ../common/spi.c
 verstage-y += timer.c
-verstage-$(CONFIG_DRIVERS_UART) += uart.c
+verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 verstage-y += gpio.c
 verstage-y += clock.c
 libverstage-y += crypto.c
 verstage-y += i2c.c
 verstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
 
-romstage-y += cbmem.c
+romstage-y += ../common/cbmem.c
 romstage-y += timer.c
-romstage-$(CONFIG_DRIVERS_UART) += uart.c
+romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 romstage-y += i2c.c
 romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
 romstage-y += clock.c
 romstage-y += gpio.c
-romstage-y += spi.c
+romstage-y += ../common/spi.c
 romstage-y += sdram.c
-romstage-y += rk808.c
+romstage-y += ../common/rk808.c
 romstage-y += pwm.c
 romstage-y += tsadc.c
 
 ramstage-y += soc.c
-ramstage-y += cbmem.c
+ramstage-y += ../common/cbmem.c
 ramstage-y += timer.c
 ramstage-y += i2c.c
 ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c
 ramstage-y += clock.c
-ramstage-y += spi.c
+ramstage-y += ../common/spi.c
 ramstage-y += sdram.c
 ramstage-y += gpio.c
-ramstage-y += rk808.c
+ramstage-y += ../common/rk808.c
 ramstage-y += pwm.c
 ramstage-y += vop.c
 ramstage-y += edp.c
 ramstage-y += hdmi.c
 ramstage-y += display.c
-ramstage-$(CONFIG_DRIVERS_UART) += uart.c
+ramstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c
 
-CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include/
+CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include
+CPPFLAGS_common += -Isrc/soc/rockchip/common/include
 
 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
 	@printf "Generating: $(subst $(obj)/,,$(@))\n"