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mb/google/brya: Set eMMC dll tuning parameters for Nissa 

Add support for MB level dll tuning.

This patch sets the eMMC dll tuning parameters to default values needed.
There was issue observed on some eMMC devices which failed to boot in
HS400 mode.EV team suggested the intermediate eMMC dll tuning parameters
that needs to be set. We observed these values helped to fix the issue.

While we get the verified default values set from FSP directly, adding
it here to use it as the custom dll values needed.

BUG=b:230403441
TEST=Build and boot nivviks board. Verify the eMMC dll parameters are
overridden.
[INFO ]  usha: After override dll_params
[INFO ]  usha: emmc_tx_cmd_cntl=505
[INFO ]  usha: emmc_tx_data_cntl1=909
[INFO ]  usha: emmc_tx_data_cntl2=1c2a2828
[INFO ]  usha: emmc_rx_cmd_data_cntl1=1c1b1d3c
[INFO ]  usha: emmc_rx_cmd_data_cntl2=10049
[INFO ]  usha: emmc_rx_strobe_cntl=11515

Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: I27771b663ce9808e5a5ef4b36c136ad78f924376
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64203
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
This commit is contained in:
Usha P 2022-05-09 08:36:51 +05:30 committed by Felix Held
parent 6b1c0e9cc3
commit 0a3bbe8645
2 changed files with 11 additions and 0 deletions
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1
src/mainboard/google/brya/Kconfig
View File

@ -69,6 +69,7 @@ config BOARD_GOOGLE_BASEBOARD_NISSA
select SYSTEM_TYPE_LAPTOP
select TI50_FIRMWARE_VERSION_NOT_SUPPORTED
select TPM_GOOGLE_TI50
select SOC_INTEL_COMMON_MMC_OVERRIDE
if BOARD_GOOGLE_BRYA_COMMON

10
src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
View File

@ -31,6 +31,16 @@ chip soc/intel/alderlake
# eMMC HS400
register "emmc_enable_hs400_mode" = "1"
#eMMC DLL tuning parameters
#Adding the intermediate eMMC DLL tuning override values
#TODO SoC implementation with the finalized verified values from EV Team
register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828"
register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B1D3C"
register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10049"
register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x11515"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C0
register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # USB2_C1
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A0