mb/intel/adlrvp: Refactor ADLRVP code to get rid of 'variants/baseboard'

List of changes:
1. Use devicetree.cb from default location
2. Create variant directory for ADL RVP with external EC as
'adlrvp_p_ext_ec'
3. Add initial overridetree.cb for 'adlrvp_p' and 'adlrvp_p_ext_ec'
to override 'devicetree.cb' as applicable.
4. Move all common files between 'adlrvp_p' and 'adlrvp_p_ext_ec'
to mainboard directory

TEST=Build and boot both ADLRVP with onboard and external EC.

Change-Id: I3591e214ed32dc9baaa49b92dff59579f29c7bd6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47335
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/intel/adlrvp/Kconfig

@@ -32,7 +32,8 @@ config MAINBOARD_DIR
 
 config VARIANT_DIR
 	string
-	default "adlrvp_p"
+	default "adlrvp_p" if BOARD_INTEL_ADLRVP_P
+	default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC
 
 config GBB_HWID
 	string
@@ -47,9 +48,9 @@ config MAINBOARD_FAMILY
 	string
 	default "Intel_adlrvp"
 
-config DEVICETREE
+config OVERRIDE_DEVICETREE
 	string
-	default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
+	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
 
 config DIMM_SPD_SIZE
 	int

src/mainboard/intel/adlrvp/Makefile.inc

@@ -4,12 +4,14 @@ subdirs-y += spd
 
 bootblock-y += bootblock.c
 bootblock-$(CONFIG_CHROMEOS) += chromeos.c
+bootblock-y += early_gpio.c
 
 verstage-$(CONFIG_CHROMEOS) += chromeos.c
 
 romstage-$(CONFIG_CHROMEOS) += chromeos.c
 romstage-y += romstage_fsp_params.c
 romstage-y += board_id.c
+romstage-y += memory.c
 
 smm-y += smihandler.c
 
@@ -17,8 +19,8 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 ramstage-y += ec.c
 ramstage-y += mainboard.c
 ramstage-y += board_id.c
+ramstage-y += gpio.c
 
-subdirs-y += variants/baseboard
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
-CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
 
 subdirs-y += variants/$(VARIANT_DIR)

src/mainboard/intel/adlrvp/memory.c

@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <arch/cpu.h>
-#include "../../board_id.h"
+#include "board_id.h"
 #include <baseboard/variants.h>
 #include <soc/romstage.h>
 

src/mainboard/intel/adlrvp/variants/adlrvp_p/Makefile.inc

@@ -1,7 +0,0 @@
-## SPDX-License-Identifier: GPL-2.0-only
-
-bootblock-y += early_gpio.c
-
-romstage-y += memory.c
-
-ramstage-y += gpio.c

src/mainboard/intel/adlrvp/variants/adlrvp_p/overridetree.cb

@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+
+	device domain 0 on end
+end

src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb

@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+
+	device domain 0 on end
+end