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nb/intel/pineview/hostbridge_regs.h: Clean up registers 

Sort them by ascending offsets.

Tested with BUILD_TIMELESS=1, Foxconn D41S does not change.

Change-Id: I521aa3e49b17a9fb6b279ae758801356e510d054
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43725
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2020-07-22 11:43:10 +02:00 committed by Patrick Georgi
parent 0ddc2459bc
commit 0a760cd05b
1 changed files with 4 additions and 3 deletions
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7
src/northbridge/intel/pineview/hostbridge_regs.h
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@ -5,9 +5,6 @@
#define EPBAR 0x40 #define EPBAR 0x40
#define MCHBAR 0x48 #define MCHBAR 0x48
#define PCIEXBAR 0x60
#define DMIBAR 0x68
#define PMIOBAR 0x78
#define GGC 0x52 /* GMCH Graphics Control */ #define GGC 0x52 /* GMCH Graphics Control */
@ -21,6 +18,10 @@
#define BOARD_DEVEN (DEVEN_D0F0 | DEVEN_D2F0 | DEVEN_D2F1) #define BOARD_DEVEN (DEVEN_D0F0 | DEVEN_D2F0 | DEVEN_D2F1)
#endif /* BOARD_DEVEN */ #endif /* BOARD_DEVEN */
#define PCIEXBAR 0x60
#define DMIBAR 0x68
#define PMIOBAR 0x78
#define PAM0 0x90 #define PAM0 0x90
#define PAM1 0x91 #define PAM1 0x91
#define PAM2 0x92 #define PAM2 0x92