mb/google/zork: Fix GPIO table for v3.6 schematics for woomax
Add board version switch GPIO table on gpio.c. BUG=b:165887084 BRANCH=Zork TEST=emerge-zork coreboot Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com> Change-Id: I661e16f7b4769e83450f41ff267c0d253441c4cd Reviewed-on: https://review.coreboot.org/c/coreboot/+/44655 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -3,7 +3,7 @@
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#include <baseboard/variants.h>
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#include <baseboard/variants.h>
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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static const struct soc_amd_gpio woomax_gpio_set_stage_ram[] = {
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static const struct soc_amd_gpio woomax_bid0_gpio_set_stage_ram[] = {
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/* GPIO_4 NC */
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/* GPIO_4 NC */
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PAD_NC(GPIO_4),
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PAD_NC(GPIO_4),
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/* GPIO_5 NC */
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/* GPIO_5 NC */
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@ -30,8 +30,43 @@ static const struct soc_amd_gpio woomax_gpio_set_stage_ram[] = {
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PAD_NC(GPIO_143),
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PAD_NC(GPIO_143),
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};
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};
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static const struct soc_amd_gpio woomax_gpio_set_stage_ram[] = {
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/* GPIO_4 NC */
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PAD_NC(GPIO_4),
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/* GPIO_5 NC */
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PAD_NC(GPIO_5),
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/* GPIO_6 NC */
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PAD_NC(GPIO_6),
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/* GPIO_11 NC */
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PAD_NC(GPIO_11),
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/* GPIO_32 NC */
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PAD_NC(GPIO_32),
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/* GPIO_69 NC */
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PAD_NC(GPIO_69),
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/* RAM_ID_4 */
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PAD_NC(GPIO_84),
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/* EN_DEV_BEEP_L */
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PAD_GPO(GPIO_89, HIGH),
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/* USI_RESET */
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PAD_GPO(GPIO_140, HIGH),
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/* GPIO_141 NC */
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PAD_NC(GPIO_141),
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/* GPIO_143 NC */
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PAD_NC(GPIO_143),
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};
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const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
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const struct soc_amd_gpio *variant_override_gpio_table(size_t *size)
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{
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{
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uint32_t board_version;
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/* If board version cannot be read, assume it is board_version 0. */
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if (google_chromeec_cbi_get_board_version(&board_version))
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board_version = 0;
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if (board_version == 0) {
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*size = ARRAY_SIZE(woomax_bid0_gpio_set_stage_ram);
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return woomax_bid0_gpio_set_stage_ram;
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}
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*size = ARRAY_SIZE(woomax_gpio_set_stage_ram);
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*size = ARRAY_SIZE(woomax_gpio_set_stage_ram);
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return woomax_gpio_set_stage_ram;
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return woomax_gpio_set_stage_ram;
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}
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}
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