sconfig: rename lapic_cluster -> cpu_cluster

The name lapic_cluster is a bit misleading, since the construct is not local
APIC specific by concept. As implementations and hardware change, be more
generic about our naming. This will allow us to support non-x86 systems without
adding new keywords.

Change-Id: Icd7f5fcf6f54d242eabb5e14ee151eec8d6cceb1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2377
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

documentation/Kconfig.tex

@@ -139,9 +139,9 @@ properly, as it defines topology and chips that can be defined no other way.
 Let's go through the tree.
 \begin{verbatim}
 chip northbridge/amd/amdk8/root_complex
-  device apic_cluster 0 on
+  device cpu_cluster 0 on
     chip cpu/amd/socket_F
-      device apic 0 on end
+      device lapic 0 on end
     end
   end
 \end{verbatim}
@@ -153,11 +153,11 @@ somewhere, since it runs memory.
 
 
 What is the APIC? Northbridges always have an Advanced Programmable Interrupt Controller, and that {\it APIC cluster} is a topological connection to the
-CPU socket. So the tree is rooted at the northbridge, which has a link to an apic cluster, and then the CPU. The CPU contains
+CPU socket. So the tree is rooted at the northbridge, which has a link to a CPU cluster, and then the CPU. The CPU contains
 its own APIC, and will define any parameters needed. In this case, we have a northbridge of type
-{\it northbridge/amd/amdk8/root\_complex}, with its own apic\_cluster device which we turn on,
+{\it northbridge/amd/amdk8/root\_complex}, with its own cpu\_cluster device which we turn on,
 which connects to a {\it cpu/amd/socket\_F},
-which has an apic, which is on.
+which has a local apic, which is on.
 
 Note that we do not enumerate all CPUs, even on this SMP mainboard. The reason is they may not all be there. The CPU we define here
 is the so-called Boot Strap Processor, or BSP; the other CPUs will come along later, as the are discovered. We do not require (unlike many

src/arch/x86/boot/acpi.c

@@ -146,7 +146,7 @@ unsigned long acpi_create_madt_lapics(unsigned long current)
 
 	for (cpu = all_devices; cpu; cpu = cpu->next) {
 		if ((cpu->path.type != DEVICE_PATH_APIC) ||
-			(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
+			(cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
 			continue;
 		}
 		if (!cpu->enabled)

src/arch/x86/boot/mpspec.c

@@ -152,7 +152,7 @@ void smp_write_processors(struct mp_config_table *mc)
 	for(cpu = all_devices; cpu; cpu = cpu->next) {
 		unsigned long cpu_flag;
 		if ((cpu->path.type != DEVICE_PATH_APIC) ||
-			(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
+			(cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER))
 		{
 			continue;
 		}

src/cpu/amd/sc520/sc520.c

@@ -194,7 +194,7 @@ static void enable_dev(struct device *dev)
 	/* This is never hit as none of the sc520 boards have
 	 * an APIC cluster defined
 	 */
-        else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
+        else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
                 dev->ops = &cpu_bus_ops;
         }
 #endif

src/cpu/intel/speedstep/acpi.c

@@ -48,7 +48,7 @@ static int determine_total_number_of_cores(void)
 	int count = 0;
 	for(cpu = all_devices; cpu; cpu = cpu->next) {
 		if ((cpu->path.type != DEVICE_PATH_APIC) ||
-			(cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER)) {
+			(cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER)) {
 			continue;
 		}
 		if (!cpu->enabled) {

src/device/device_util.c

@@ -209,9 +209,9 @@ const char *dev_path(device_t dev)
 			sprintf(buffer, "DOMAIN: %04x",
 				dev->path.domain.domain);
 			break;
-		case DEVICE_PATH_APIC_CLUSTER:
+		case DEVICE_PATH_CPU_CLUSTER:
-			sprintf(buffer, "APIC_CLUSTER: %01x",
+			sprintf(buffer, "CPU_CLUSTER: %01x",
-				dev->path.apic_cluster.cluster);
+				dev->path.cpu_cluster.cluster);
 			break;
 		case DEVICE_PATH_CPU:
 			sprintf(buffer, "CPU: %02x", dev->path.cpu.id);
@@ -274,9 +274,9 @@ int path_eq(struct device_path *path1, struct device_path *path2)
 	case DEVICE_PATH_DOMAIN:
 		equal = (path1->domain.domain == path2->domain.domain);
 		break;
-	case DEVICE_PATH_APIC_CLUSTER:
+	case DEVICE_PATH_CPU_CLUSTER:
-		equal = (path1->apic_cluster.cluster
+		equal = (path1->cpu_cluster.cluster
-			 == path2->apic_cluster.cluster);
+			 == path2->cpu_cluster.cluster);
 		break;
 	case DEVICE_PATH_CPU:
 		equal = (path1->cpu.id == path2->cpu.id);
@@ -859,7 +859,7 @@ int dev_count_cpu(void)
 
 	for (cpu = all_devices; cpu; cpu = cpu->next) {
 		if ((cpu->path.type != DEVICE_PATH_APIC) ||
-		    (cpu->bus->dev->path.type != DEVICE_PATH_APIC_CLUSTER))
+		    (cpu->bus->dev->path.type != DEVICE_PATH_CPU_CLUSTER))
 			continue;
 		if (!cpu->enabled)
 			continue;

src/include/device/path.h

@@ -9,7 +9,7 @@ enum device_path_type {
 	DEVICE_PATH_I2C,
 	DEVICE_PATH_APIC,
 	DEVICE_PATH_DOMAIN,
-	DEVICE_PATH_APIC_CLUSTER,
+	DEVICE_PATH_CPU_CLUSTER,
 	DEVICE_PATH_CPU,
 	DEVICE_PATH_CPU_BUS,
 	DEVICE_PATH_IOAPIC,
@@ -50,7 +50,7 @@ struct ioapic_path
 	unsigned ioapic_id;
 };
 
-struct apic_cluster_path
+struct cpu_cluster_path
 {
 	unsigned cluster;
 };
@@ -69,15 +69,15 @@ struct cpu_bus_path
 struct device_path {
 	enum device_path_type type;
 	union {
-		struct pci_path          pci;
+		struct pci_path		pci;
-		struct pnp_path          pnp;
+		struct pnp_path		pnp;
-		struct i2c_path          i2c;
+		struct i2c_path		i2c;
-		struct apic_path         apic;
+		struct apic_path	apic;
-		struct ioapic_path	 ioapic;
+		struct ioapic_path	ioapic;
-		struct domain_path	 domain;
+		struct domain_path	domain;
-		struct apic_cluster_path apic_cluster;
+		struct cpu_cluster_path cpu_cluster;
-		struct cpu_path          cpu;
+		struct cpu_path		cpu;
-		struct cpu_bus_path      cpu_bus;
+		struct cpu_bus_path	cpu_bus;
 	};
 };
 

src/mainboard/a-trend/atc-6220/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/a-trend/atc-6240/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/aaeon/pfm-540i_revb/devicetree.cb

@@ -65,7 +65,7 @@ chip northbridge/amd/lx
 		end
 	end
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/abit/be6-ii_v2_0/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/advansus/a785e-i/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for advansus/A785E-I
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_ASB2  #L1 and DDR3
 			 device lapic 0 on end
 		end

src/mainboard/amd/bimini_fam10/devicetree.cb

@@ -1,6 +1,6 @@
 	# sample config for amd/bimini_fam10
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_ASB2  #L1 and DDR3
 			 device lapic 0 on end
 		end

src/mainboard/amd/db800/devicetree.cb

@@ -59,7 +59,7 @@ chip northbridge/amd/lx
 		end
 	end
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/amd/dbm690t/devicetree.cb

@@ -9,7 +9,7 @@
 #Define gfx_reconfiguration, 0: short reconfiguration, 1(default): long reconfiguration
 #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_S1G1
 		device lapic 0 on end
 		end

src/mainboard/amd/dinar/devicetree.cb

@@ -18,7 +18,7 @@
 #
 
 chip northbridge/amd/agesa/family15/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/agesa/family15
 		device lapic 0x20 on end
 		end

src/mainboard/amd/inagua/devicetree.cb

@@ -17,7 +17,7 @@
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 #
 chip northbridge/amd/agesa/family14/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/agesa/family14
 			device lapic 0 on end
 		end

src/mainboard/amd/mahogany/devicetree.cb

@@ -9,7 +9,7 @@
 #Define gfx_reconfiguration, 0: short reconfiguration, 1(default): long reconfiguration
 #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM2
 		device lapic 0 on end
 		end

src/mainboard/amd/mahogany_fam10/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for amd/mahogany_fam10
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM2r2  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/amd/norwich/devicetree.cb

@@ -32,7 +32,7 @@ chip northbridge/amd/lx
 		end
 	end
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/amd/parmer/devicetree.cb

@@ -18,7 +18,7 @@
 #
 chip northbridge/amd/agesa/family15tn/root_complex
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/agesa/family15tn
 			device lapic 10 on end
 		end

src/mainboard/amd/persimmon/devicetree.cb

@@ -17,7 +17,7 @@
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 #
 chip northbridge/amd/agesa/family14/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 			chip cpu/amd/agesa/family14
 			  device lapic 0 on end
 			end

src/mainboard/amd/pistachio/devicetree.cb

@@ -9,7 +9,7 @@
 #Define gfx_reconfiguration, 0: short reconfiguration, 1(default): long reconfiguration
 #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM2
 		device lapic 0 on end
 		end

src/mainboard/amd/rumba/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/gx2
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_gx2
 			device lapic 0 on end
 		end

src/mainboard/amd/serengeti_cheetah/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/socket_F
                         device lapic 0 on end
                 end

src/mainboard/amd/serengeti_cheetah_fam10/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_F_1207  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/amd/south_station/devicetree.cb

@@ -17,7 +17,7 @@
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 #
 chip northbridge/amd/agesa/family14/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/agesa/family14
                   device lapic 0 on end
                 end

src/mainboard/amd/thatcher/devicetree.cb

@@ -18,7 +18,7 @@
 #
 chip northbridge/amd/agesa/family15tn/root_complex
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/agesa/family15tn
 			device lapic 10 on end
 		end

src/mainboard/amd/tilapia_fam10/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for amd/tilapia_fam10
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR3
 			 device lapic 0 on end
 		end

src/mainboard/amd/torpedo/devicetree.cb

@@ -17,7 +17,7 @@
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 #
 chip northbridge/amd/agesa/family12/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/agesa/family12
                   device lapic 0 on end
                 end

src/mainboard/amd/union_station/devicetree.cb

@@ -17,7 +17,7 @@
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 #
 chip northbridge/amd/agesa/family14/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/agesa/family14
                   device lapic 0 on end
                 end

src/mainboard/aopen/dxplplusu/devicetree.cb

@@ -21,7 +21,7 @@
 
 chip northbridge/intel/e7505
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_mPGA604
 			device lapic 0 on end
 			device lapic 6 on end

src/mainboard/arima/hdama/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_940
 			device lapic 0 on end
 		end

src/mainboard/artecgroup/dbe61/devicetree.cb

@@ -32,7 +32,7 @@ chip northbridge/amd/lx
 		end
 	end
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/asrock/939a785gmh/devicetree.cb

@@ -10,7 +10,7 @@
 #Define gfx_reconfiguration, 0: short reconfiguration, 1(default): long reconfiguration
 #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_939
 		device lapic 0 on end
 		end

src/mainboard/asrock/e350m1/devicetree.cb

@@ -17,7 +17,7 @@
 # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 #
 chip northbridge/amd/agesa/family14/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/agesa/family14
                   device lapic 0 on end
                 end

src/mainboard/asus/a8n_e/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# (L)APIC cluster
+  device cpu_cluster 0 on			# (L)APIC cluster
     chip cpu/amd/socket_939			# CPU socket
       device lapic 0 on end			# Local APIC of the CPU
     end

src/mainboard/asus/a8v-e_deluxe/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/amd/socket_939			# CPU
       device lapic 0 on end			# APIC
     end

src/mainboard/asus/a8v-e_se/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/amd/socket_939			# CPU
       device lapic 0 on end			# APIC
     end

src/mainboard/asus/dsbf/devicetree.cb

@@ -22,7 +22,7 @@
 
 chip northbridge/intel/i5000
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_LGA771
 			device lapic 0 on end
 		end

src/mainboard/asus/k8v-x/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/amd/socket_754			# CPU
       device lapic 0 on end			# APIC
     end

src/mainboard/asus/m2n-e/devicetree.cb

@@ -19,7 +19,7 @@
 ##
 
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# (L)APIC cluster
+  device cpu_cluster 0 on			# (L)APIC cluster
     chip cpu/amd/socket_AM2			# CPU socket
       device lapic 0 on end			# Local APIC of the CPU
     end

src/mainboard/asus/m2v-mx_se/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/amd/socket_AM2			# CPU
       device lapic 0 on end			# APIC
     end

src/mainboard/asus/m2v/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/amd/socket_AM2			# CPU
       device lapic 0 on end			# APIC
     end

src/mainboard/asus/m4a78-em/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/asus/m4a785-m/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/asus/m4a785t-m/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/asus/m5a88-v/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for advansus/A785E-I
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR3
 			 device lapic 0 on end
 		end

src/mainboard/asus/mew-am/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i82810		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/socket_PGA370	# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/asus/p2b-d/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# (L)APIC cluster
+  device cpu_cluster 0 on		# (L)APIC cluster
     chip cpu/intel/slot_1		# CPU socket 0
       device lapic 0 on end		# Local APIC of CPU 0
     end

src/mainboard/asus/p2b-ds/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# (L)APIC cluster
+  device cpu_cluster 0 on		# (L)APIC cluster
     chip cpu/intel/slot_1		# CPU socket 0
       device lapic 0 on end		# Local APIC of CPU 0
     end

src/mainboard/asus/p2b-f/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/asus/p2b-ls/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/asus/p2b/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/asus/p3b-f/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/avalue/eax-785e/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for avalue/EAX-785E
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR3
 			 device lapic 0 on end
 		end

src/mainboard/azza/pt-6ibd/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/bachmann/ot200/devicetree.cb

@@ -32,7 +32,7 @@ chip northbridge/amd/lx
 		end
 	end
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/bcom/winnetp680/devicetree.cb

@@ -56,7 +56,7 @@ chip northbridge/via/cn700			# Northbridge
       device pci 12.0 on end			# Ethernet
     end
   end
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/via/c7			# VIA C7
       device lapic 0 on end			# APIC
     end

src/mainboard/biostar/m6tba/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/broadcom/blast/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/socket_940
                         device lapic 0 on end
                 end

src/mainboard/compaq/deskpro_en_sff_p600/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/digitallogic/adl855pc/devicetree.cb

@@ -48,7 +48,7 @@ chip northbridge/intel/i855
                 	end
 		end
 	end
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_mPGA479M
 			device lapic 0 on end
 		end

src/mainboard/digitallogic/msm800sev/devicetree.cb

@@ -76,7 +76,7 @@ chip northbridge/amd/lx
 	end
 
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/ecs/p6iwp-fe/devicetree.cb

@@ -19,7 +19,7 @@
 ##
 
 chip northbridge/intel/i82810		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/socket_PGA370	# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/getac/p470/devicetree.cb

@@ -21,7 +21,7 @@
 
 chip northbridge/intel/i945
 
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478
                         device lapic 0 on end
                 end

src/mainboard/gigabyte/ga-6bxc/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/gigabyte/ga-6bxe/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/intel/i440bx		# Northbridge
-  device lapic_cluster 0 on		# APIC cluster
+  device cpu_cluster 0 on		# APIC cluster
     chip cpu/intel/slot_1		# CPU
       device lapic 0 on end		# APIC
     end

src/mainboard/gigabyte/ga_2761gxdk/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/socket_AM2
                         device lapic 0 on end
                 end

src/mainboard/gigabyte/m57sli/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex		# Root complex
-  device lapic_cluster 0 on			# (L)APIC cluster
+  device cpu_cluster 0 on			# (L)APIC cluster
     chip cpu/amd/socket_AM2			# CPU socket
       device lapic 0 on end			# Local APIC of the CPU
     end

src/mainboard/gigabyte/ma785gm/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for gigabyte/ma785gm
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/gigabyte/ma785gmt/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for gigabyte/ma785gmt
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM3  #L1 and DDR3
 			 device lapic 0 on end
 		end

src/mainboard/gigabyte/ma78gm/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for gigabyte/ma78gm
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM2r2  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/google/butterfly/devicetree.cb

@@ -12,7 +12,7 @@ chip northbridge/intel/sandybridge
 	register "gpu_panel_power_backlight_on_delay" = "2100"	# T3: 210ms
 	register "gpu_panel_power_backlight_off_delay" = "2100"	# T4: 210ms
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_rPGA989
 			device lapic 0 on end
 		end

src/mainboard/google/parrot/devicetree.cb

@@ -15,7 +15,7 @@ chip northbridge/intel/sandybridge
 	register "gpu_cpu_backlight" = "0x000001d4"
 	register "gpu_pch_backlight" = "0x03aa0000"
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_rPGA989
 			device lapic 0 on end
 		end

src/mainboard/hp/dl145_g1/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_940
 			device lapic 0 on end
 		end

src/mainboard/hp/dl145_g3/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_F
 			device lapic 0 on end
 		end

src/mainboard/hp/dl165_g6_fam10/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_F_1207
 			device lapic 0 on end
 		end

src/mainboard/hp/e_vectra_p2706t/devicetree.cb

@@ -1,6 +1,6 @@
 # TODO: i810E actually!
 chip northbridge/intel/i82810			# Northbridge
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/intel/socket_PGA370		# CPU
       device lapic 0 on end			# APIC
     end

src/mainboard/ibase/mb899/devicetree.cb

@@ -1,6 +1,6 @@
 chip northbridge/intel/i945
 
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/intel/socket_mFCPGA478
                         device lapic 0 on end
                 end

src/mainboard/ibm/e325/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_940
 			device lapic 0 on end
 		end

src/mainboard/ibm/e326/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_940
 			device lapic 0 on end
 		end

src/mainboard/iei/kino-780am2-fam10/devicetree.cb

@@ -1,6 +1,6 @@
 # Config for iei/kino-780am2-fam10
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM2r2  #L1 and DDR2
 			 device lapic 0 on end
 		end

src/mainboard/iei/pcisa-lx-800-r10/devicetree.cb

@@ -67,7 +67,7 @@ chip northbridge/amd/lx
 		end
 	end
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/iei/pm-lx-800-r11/devicetree.cb

@@ -93,7 +93,7 @@ chip northbridge/amd/lx
 	end
 
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/iei/pm-lx2-800-r10/devicetree.cb

@@ -79,7 +79,7 @@ chip northbridge/amd/lx
 		end
 	end
 	# APIC cluster is late CPU init.
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/geode_lx
 			device lapic 0 on end
 		end

src/mainboard/intel/d810e2cb/devicetree.cb

@@ -19,7 +19,7 @@
 ##
 
 chip northbridge/intel/i82810           # Northbridge
-  device lapic_cluster 0 on              # APIC cluster
+  device cpu_cluster 0 on              # APIC cluster
     chip cpu/intel/socket_FC_PGA370      # CPU
       device lapic 0 on end              # APIC
     end

src/mainboard/intel/d945gclf/devicetree.cb

@@ -19,7 +19,7 @@
 
 chip northbridge/intel/i945
 
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/intel/socket_441
                         device lapic 0 on end
                 end

src/mainboard/intel/eagleheights/devicetree.cb

@@ -64,7 +64,7 @@ chip northbridge/intel/i3100
 			device pci 1f.4 on end # Performance counters
                 end
         end
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/intel/socket_BGA956
                         device lapic 0 on end
                 end

src/mainboard/intel/emeraldlake2/devicetree.cb

@@ -9,7 +9,7 @@ chip northbridge/intel/sandybridge
 	# Enable DVI Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_rPGA989
 			device lapic 0 on end
 		end

src/mainboard/intel/jarrell/devicetree.cb

@@ -69,7 +69,7 @@ chip northbridge/intel/e7520
 			register "gpio[41]" = "ICH5R_GPIO_USE_AS_GPIO | ICH5R_GPIO_SEL_INPUT"
 		end
 	end
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_mPGA604 # cpu 0
 			device lapic 0 on end
 		end

src/mainboard/intel/mtarvon/devicetree.cb

@@ -37,7 +37,7 @@ chip northbridge/intel/i3100
                         device pci 1f.3 on end # SMBus
                 end
         end
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/intel/socket_mPGA479M
                         device lapic 0 on end
                 end

src/mainboard/intel/truxton/devicetree.cb

@@ -47,7 +47,7 @@ chip northbridge/intel/i3100
                         device pci 1f.4 on end  # ?
                 end
         end
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/intel/ep80579
                         device lapic 0 on end
                 end

src/mainboard/intel/xe7501devkit/devicetree.cb

@@ -62,7 +62,7 @@ chip northbridge/intel/e7501
 			device pci 1f.6 off end # AC97 Modem
 		end # SB
 	end # PCI domain
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_mPGA604
 			device lapic 0 on end
 		end

src/mainboard/iwave/iWRainbowG6/devicetree.cb

@@ -1,6 +1,6 @@
 chip northbridge/intel/sch
 
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/intel/socket_441
 			device lapic 0 on end
 		end

src/mainboard/iwill/dk8_htx/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-        device lapic_cluster 0 on
+        device cpu_cluster 0 on
                 chip cpu/amd/socket_940
                         device lapic 0 on end
                 end

src/mainboard/iwill/dk8s2/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_940
 			device lapic 0 on end
 		end

src/mainboard/iwill/dk8x/devicetree.cb

@@ -1,5 +1,5 @@
 chip northbridge/amd/amdk8/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_940
 			device lapic 0 on end
 		end

src/mainboard/jetway/j7f24/devicetree.cb

@@ -54,7 +54,7 @@ chip northbridge/via/cn700			# Northbridge
       device pci 12.0 on end			# Ethernet
     end
   end
-  device lapic_cluster 0 on			# APIC cluster
+  device cpu_cluster 0 on			# APIC cluster
     chip cpu/via/c7			# VIA C7
       device lapic 0 on end			# APIC
     end

src/mainboard/jetway/pa78vm5/devicetree.cb

@@ -1,6 +1,6 @@
 # sample config for jetway/PA78VM5
 chip northbridge/amd/amdfam10/root_complex
-	device lapic_cluster 0 on
+	device cpu_cluster 0 on
 		chip cpu/amd/socket_AM2r2  #L1 and DDR2
 			 device lapic 0 on end
 		end