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google/lars: Disable SD 3.0 Controller [D30:F6] 

LARs design don't have SD Connector over native SD Controller.

BUG=chrome-os-partner:48190
BRANCH=None
TEST=Build & boot LARs. Use "lspci" doesn't list 0x1E:06
device in list.
CQ-DEPEND=CL:315420

Change-Id: Idff7243a6aaf4b8d5f49e4bf215a77131f716485
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ca769138b97b404598c4a6bfa6c2ff5c1c3ec896
Original-Change-Id: I71416ac89a8c91ab272d6737d1b46c8045567e17
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/315423
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12947
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Subrata Banik 2015-12-02 12:25:37 +05:30 committed by Patrick Georgi
parent 086730b062
commit 0ab8e00aeb
2 changed files with 3 additions and 2 deletions
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1
src/mainboard/google/lars/Kconfig
View File

@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select EC_GOOGLE_CHROMEEC_LPC select EC_GOOGLE_CHROMEEC_LPC
select EC_GOOGLE_CHROMEEC_MEC select EC_GOOGLE_CHROMEEC_MEC
select EC_GOOGLE_CHROMEEC_PD select EC_GOOGLE_CHROMEEC_PD
select EXCLUDE_NATIVE_SD_INTERFACE
select HAVE_ACPI_RESUME select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE select HAVE_OPTION_TABLE

4
src/mainboard/google/lars/devicetree.cb
View File

@ -36,7 +36,7 @@ chip soc/intel/skylake
register "Cio2Enable" = "0" register "Cio2Enable" = "0"
register "ScsEmmcEnabled" = "1" register "ScsEmmcEnabled" = "1"
register "ScsEmmcHs400Enabled" = "0" register "ScsEmmcHs400Enabled" = "0"
register "ScsSdCardEnabled" = "2" register "ScsSdCardEnabled" = "0"
register "IshEnable" = "0" register "IshEnable" = "0"
register "PttSwitch" = "0" register "PttSwitch" = "0"
register "InternalGfx" = "1" register "InternalGfx" = "1"
@ -117,7 +117,7 @@ chip soc/intel/skylake
device pci 1e.3 off end # GSPI #1 device pci 1e.3 off end # GSPI #1
device pci 1e.4 on end # eMMC device pci 1e.4 on end # eMMC
device pci 1e.5 off end # SDIO device pci 1e.5 off end # SDIO
device pci 1e.6 on end # SDCard device pci 1e.6 off end # SDCard
device pci 1f.0 on device pci 1f.0 on
chip drivers/pc80/tpm chip drivers/pc80/tpm
device pnp 0c31.0 on end device pnp 0c31.0 on end