device/device.h: Rename pci_domain_scan_bus

On all targets the domain works as a host bridge. Xeon-sp code intends
to feature multiple host bridges below a domain, hence rename the
function to pci_host_bridge_scan_bus.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I4e65fdbaf0b42c5f4f62297a60d818d299d76f73
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78326
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>

src/device/pci_device.c

@@ -1662,7 +1662,7 @@ void pci_scan_bridge(struct device *dev)
  *
  * @param dev Pointer to the domain.
  */
-void pci_domain_scan_bus(struct device *dev)
+void pci_host_bridge_scan_bus(struct device *dev)
 {
 	struct bus *link = dev->link_list;
 	pci_scan_bus(link, PCI_DEVFN(0, 0), 0xff);

src/include/device/device.h

@@ -272,7 +272,7 @@ void show_all_devs_resources(int debug_level, const char *msg);
 extern struct device_operations default_dev_ops_root;
 void pci_domain_read_resources(struct device *dev);
 void pci_domain_set_resources(struct device *dev);
-void pci_domain_scan_bus(struct device *dev);
+void pci_host_bridge_scan_bus(struct device *dev);
 
 void mmconf_resource(struct device *dev, unsigned long index);
 

src/mainboard/emulation/qemu-aarch64/mainboard.c

@@ -49,5 +49,5 @@ static void qemu_aarch64_domain_read_resources(struct device *dev)
 struct device_operations qemu_aarch64_pci_domain_ops = {
 	.read_resources    = qemu_aarch64_domain_read_resources,
 	.set_resources     = pci_domain_set_resources,
-	.scan_bus          = pci_domain_scan_bus,
+	.scan_bus          = pci_host_bridge_scan_bus,
 };

src/mainboard/emulation/qemu-i440fx/northbridge.c

@@ -230,7 +230,7 @@ static const char *qemu_acpi_name(const struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources		= cpu_pci_domain_read_resources,
 	.set_resources		= cpu_pci_domain_set_resources,
-	.scan_bus		= pci_domain_scan_bus,
+	.scan_bus		= pci_host_bridge_scan_bus,
 #if CONFIG(GENERATE_SMBIOS_TABLES)
 	.get_smbios_data	= qemu_get_smbios_data,
 #endif

src/northbridge/amd/pi/00730F01/northbridge.c

@@ -840,7 +840,7 @@ static const char *domain_acpi_name(const struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources	  = domain_read_resources,
 	.set_resources	  = pci_domain_set_resources,
-	.scan_bus	  = pci_domain_scan_bus,
+	.scan_bus	  = pci_host_bridge_scan_bus,
 	.acpi_name        = domain_acpi_name,
 };
 

src/northbridge/intel/e7505/northbridge.c

@@ -58,7 +58,7 @@ static void mch_domain_set_resources(struct device *dev)
 struct device_operations e7505_pci_domain_ops = {
 	.read_resources   = mch_domain_read_resources,
 	.set_resources    = mch_domain_set_resources,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = pci_host_bridge_scan_bus,
 	.ops_pci          = &pci_dev_ops_pci,
 };
 

src/northbridge/intel/gm45/northbridge.c

@@ -183,7 +183,7 @@ struct device_operations gm45_pci_domain_ops = {
 	.read_resources   = mch_domain_read_resources,
 	.set_resources    = mch_domain_set_resources,
 	.init             = mch_domain_init,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = pci_host_bridge_scan_bus,
 	.write_acpi_tables = northbridge_write_acpi_tables,
 	.acpi_fill_ssdt   = pci_domain_ssdt,
 	.acpi_name        = northbridge_acpi_name,

src/northbridge/intel/haswell/northbridge.c

@@ -36,7 +36,7 @@ static const char *northbridge_acpi_name(const struct device *dev)
 struct device_operations haswell_pci_domain_ops = {
 	.read_resources    = pci_domain_read_resources,
 	.set_resources     = pci_domain_set_resources,
-	.scan_bus          = pci_domain_scan_bus,
+	.scan_bus          = pci_host_bridge_scan_bus,
 	.acpi_name         = northbridge_acpi_name,
 	.write_acpi_tables = northbridge_write_acpi_tables,
 };

src/northbridge/intel/i440bx/northbridge.c

@@ -69,7 +69,7 @@ static void i440bx_domain_read_resources(struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources		= i440bx_domain_read_resources,
 	.set_resources		= pci_domain_set_resources,
-	.scan_bus		= pci_domain_scan_bus,
+	.scan_bus		= pci_host_bridge_scan_bus,
 };
 
 static int get_cpu_count(void)

src/northbridge/intel/i945/northbridge.c

@@ -97,7 +97,7 @@ void northbridge_write_smram(u8 smram)
 struct device_operations i945_pci_domain_ops = {
 	.read_resources   = mch_domain_read_resources,
 	.set_resources    = mch_domain_set_resources,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = pci_host_bridge_scan_bus,
 	.acpi_name        = northbridge_acpi_name,
 };
 

src/northbridge/intel/ironlake/northbridge.c

@@ -71,7 +71,7 @@ static const char *northbridge_acpi_name(const struct device *dev)
 struct device_operations ironlake_pci_domain_ops = {
 	.read_resources	= pci_domain_read_resources,
 	.set_resources	= pci_domain_set_resources,
-	.scan_bus	= pci_domain_scan_bus,
+	.scan_bus	= pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name	= northbridge_acpi_name,
 #endif

src/northbridge/intel/pineview/northbridge.c

@@ -137,7 +137,7 @@ static struct device_operations pci_domain_ops = {
 	.read_resources	= mch_domain_read_resources,
 	.set_resources	= mch_domain_set_resources,
 	.init		= mch_domain_init,
-	.scan_bus	= pci_domain_scan_bus,
+	.scan_bus	= pci_host_bridge_scan_bus,
 	.acpi_fill_ssdt	= generate_cpu_entries,
 	.acpi_name	= northbridge_acpi_name,
 };

src/northbridge/intel/sandybridge/northbridge.c

@@ -55,7 +55,7 @@ static const char *northbridge_acpi_name(const struct device *dev)
 struct device_operations sandybridge_pci_domain_ops = {
 	.read_resources    = pci_domain_read_resources,
 	.set_resources     = pci_domain_set_resources,
-	.scan_bus          = pci_domain_scan_bus,
+	.scan_bus          = pci_host_bridge_scan_bus,
 	.write_acpi_tables = northbridge_write_acpi_tables,
 	.acpi_name         = northbridge_acpi_name,
 };

src/northbridge/intel/x4x/northbridge.c

@@ -111,7 +111,7 @@ struct device_operations x4x_pci_domain_ops = {
 	.read_resources   = mch_domain_read_resources,
 	.set_resources    = mch_domain_set_resources,
 	.init             = mch_domain_init,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = pci_host_bridge_scan_bus,
 	.write_acpi_tables = northbridge_write_acpi_tables,
 	.acpi_fill_ssdt   = generate_cpu_entries,
 	.acpi_name        = northbridge_acpi_name,

src/soc/amd/common/block/data_fabric/domain.c

@@ -28,12 +28,12 @@ void amd_pci_domain_scan_bus(struct device *domain)
 
 	/* Set bus first number of PCI root */
 	domain->link_list->secondary = bus;
-	/* subordinate needs to be the same as secondary before pci_domain_scan_bus call. */
+	/* subordinate needs to be the same as secondary before pci_host_bridge_scan_bus call. */
 	domain->link_list->subordinate = bus;
 	/* Tell allocator about maximum PCI bus number in domain */
 	domain->link_list->max_subordinate = limit;
 
-	pci_domain_scan_bus(domain);
+	pci_host_bridge_scan_bus(domain);
 }
 
 static void print_df_mmio_outside_of_cpu_mmio_error(unsigned int reg)

src/soc/amd/stoneyridge/chip.c

@@ -84,7 +84,7 @@ struct device_operations stoneyridge_pci_domain_ops = {
 	.read_resources	  = domain_read_resources,
 	.set_resources	  = pci_domain_set_resources,
 	.enable_resources = domain_enable_resources,
-	.scan_bus	  = pci_domain_scan_bus,
+	.scan_bus	  = pci_host_bridge_scan_bus,
 	.acpi_name	  = soc_acpi_name,
 };
 

src/soc/cavium/cn81xx/ecam0.c

@@ -312,5 +312,5 @@ static void ecam0_init(struct device *dev)
 struct device_operations pci_domain_ops_ecam0 = {
 	.read_resources   = ecam0_read_resources,
 	.init             = ecam0_init,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = pci_host_bridge_scan_bus,
 };

src/soc/intel/alderlake/chip.c

@@ -248,7 +248,7 @@ static void cpu_set_north_irqs(struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
-	.scan_bus         = &pci_domain_scan_bus,
+	.scan_bus         = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	.acpi_fill_ssdt   = ssdt_set_above_4g_pci,

src/soc/intel/apollolake/chip.c

@@ -202,7 +202,7 @@ const char *soc_acpi_name(const struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources = pci_domain_read_resources,
 	.set_resources = pci_domain_set_resources,
-	.scan_bus = pci_domain_scan_bus,
+	.scan_bus = pci_host_bridge_scan_bus,
 	.acpi_name = &soc_acpi_name,
 	.acpi_fill_ssdt = ssdt_set_above_4g_pci,
 };

src/soc/intel/baytrail/chip.c

@@ -11,7 +11,7 @@
 static struct device_operations pci_domain_ops = {
 	.read_resources   = pci_domain_read_resources,
 	.set_resources    = pci_domain_set_resources,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = pci_host_bridge_scan_bus,
 };
 
 static struct device_operations cpu_bus_ops = {

src/soc/intel/braswell/chip.c

@@ -13,7 +13,7 @@
 static struct device_operations pci_domain_ops = {
 	.read_resources   = pci_domain_read_resources,
 	.set_resources    = pci_domain_set_resources,
-	.scan_bus         = pci_domain_scan_bus,
+	.scan_bus         = pci_host_bridge_scan_bus,
 };
 
 static struct device_operations cpu_bus_ops = {

src/soc/intel/broadwell/northbridge.c

@@ -400,7 +400,7 @@ static const struct pci_driver systemagent_driver __pci_driver = {
 struct device_operations broadwell_pci_domain_ops = {
 	.read_resources    = &pci_domain_read_resources,
 	.set_resources     = &pci_domain_set_resources,
-	.scan_bus          = &pci_domain_scan_bus,
+	.scan_bus          = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.write_acpi_tables = &northbridge_write_acpi_tables,
 #endif

src/soc/intel/cannonlake/chip.c

@@ -174,7 +174,7 @@ static void cpu_set_north_irqs(struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
-	.scan_bus         = &pci_domain_scan_bus,
+	.scan_bus         = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	.acpi_fill_ssdt   = ssdt_set_above_4g_pci,

src/soc/intel/denverton_ns/chip.c

@@ -109,7 +109,7 @@ const char *soc_acpi_name(const struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources = &pci_domain_read_resources,
 	.set_resources = &pci_domain_set_resources,
-	.scan_bus = &pci_domain_scan_bus,
+	.scan_bus = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name = &soc_acpi_name,
 #endif

src/soc/intel/elkhartlake/chip.c

@@ -132,7 +132,7 @@ void soc_init_pre_device(void *chip_info)
 static struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
-	.scan_bus         = &pci_domain_scan_bus,
+	.scan_bus         = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	.acpi_fill_ssdt   = ssdt_set_above_4g_pci,

src/soc/intel/jasperlake/chip.c

@@ -139,7 +139,7 @@ void soc_init_pre_device(void *chip_info)
 static struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
-	.scan_bus         = &pci_domain_scan_bus,
+	.scan_bus         = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	.acpi_fill_ssdt   = ssdt_set_above_4g_pci,

src/soc/intel/meteorlake/chip.c

@@ -203,7 +203,7 @@ static void cpu_set_north_irqs(struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
-	.scan_bus         = &pci_domain_scan_bus,
+	.scan_bus         = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	.acpi_fill_ssdt   = ssdt_set_above_4g_pci,

src/soc/intel/skylake/chip.c

@@ -189,7 +189,7 @@ void soc_init_pre_device(void *chip_info)
 struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
-	.scan_bus         = &pci_domain_scan_bus,
+	.scan_bus         = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	.acpi_fill_ssdt   = ssdt_set_above_4g_pci,

src/soc/intel/tigerlake/chip.c

@@ -179,7 +179,7 @@ static void cpu_set_north_irqs(struct device *dev)
 static struct device_operations pci_domain_ops = {
 	.read_resources   = &pci_domain_read_resources,
 	.set_resources    = &pci_domain_set_resources,
-	.scan_bus         = &pci_domain_scan_bus,
+	.scan_bus         = &pci_host_bridge_scan_bus,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_name        = &soc_acpi_name,
 	.acpi_fill_ssdt   = ssdt_set_above_4g_pci,

src/soc/mediatek/mt8195/soc.c

@@ -53,7 +53,7 @@ static struct device_operations soc_ops = {
 static struct device_operations pci_domain_ops = {
 	.read_resources = &mtk_pcie_domain_read_resources,
 	.set_resources = &mtk_pcie_domain_set_resources,
-	.scan_bus = &pci_domain_scan_bus,
+	.scan_bus = &pci_host_bridge_scan_bus,
 	.enable = &mtk_pcie_domain_enable,
 };
 

src/soc/qualcomm/sc7280/soc.c

@@ -10,7 +10,7 @@
 static struct device_operations pci_domain_ops = {
 	.read_resources = &qcom_pci_domain_read_resources,
 	.set_resources = &pci_domain_set_resources,
-	.scan_bus = &pci_domain_scan_bus,
+	.scan_bus = &pci_host_bridge_scan_bus,
 	.enable = &qcom_setup_pcie_host,
 };