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ipq/arm: Redesign hooks for bootblock 

The following patches had to be squashed
to properly build all the different ARM boards.

ipq8064: storm: re-arrange bootblock initialization

The recent addition of the storm bootblock initialization broke
compilation of Exynos platforms. The SOC specific code needs to be
kept in the respective source files, not in the common CPU code.

As of now coreboot does not provide a separate SOC initialization API.
In general it makes sense to invoke SOC initialization from the board
initialization code, as the board knows what SOC it is running on.

Presently all what's need initialization on 8064 is the timer. This
patch adds the SOC initialization framework for 8064 and moves there
the related code.

BUG=chrome-os-partner:27784
TEST=manual
  . nyan_big, peach_pit, and storm targets build fine now.

Original-Change-Id: Iae9a021f8cbf7d009770b02d798147a3e08420e8
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/197835
(cherry picked from commit 3ea7307b531b1a78c692e4f71a0d81b32108ebf0)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

arm: Redesign mainboard and SoC hooks for bootblock

This patch makes some slight changes to the way bootblock_cpu_init() and
bootblock_mainboard_init() are used on ARM. Experience has shown that
nearly every board needs either one or both of these hooks, so having
explicit Kconfigs for them has become unwieldy. Instead, this patch
implements them as a weak symbol that can be overridden by mainboard/SoC
code, as the more recent arm64_soc_init() is also doing.

Since the whole concept of a single "CPU" on ARM systems has kinda died
out, rename bootblock_cpu_init() to bootblock_soc_init(). (This had
already been done on Storm/ipq806x, which is now adjusted to directly
use the generic hook.) Also add a proper license header to
bootblock_common.h that was somehow missing.

Leaving non-ARM32 architectures out for now, since they are still using
the really old and weird x86 model of directly including a file. These
architectures should also eventually be aligned with the cleaner ARM32
model as they mature.

BRANCH=None
BUG=chrome-os-partner:32123
TEST=Booted on Pinky. Compiled for Storm and confirmed in the
disassembly that bootblock_soc_init() is still compiled in and called
right before the (now no-op) bootblock_mainboard_init().

Original-Change-Id: I57013b99c3af455cc3d7e78f344888d27ffb8d79
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/231940
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 257aaee9e3aeeffe50ed54de7342dd2bc9baae76)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Id055fe60a8caf63a9787138811dc69ac04dfba57
Reviewed-on: http://review.coreboot.org/7879
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Vadim Bendebury 2014-04-23 11:09:44 -07:00 committed by Marc Jones
parent db10dc797b
commit 0b341b341d
11 changed files with 81 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/arch/arm/armv4/bootblock_simple.c
View File

@ -26,12 +26,15 @@
#include <console/console.h>
#include <halt.h>
__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
void main(void)
{
const char *stage_name = "fallback/romstage";
void *entry;
bootblock_cpu_init();
bootblock_soc_init();
bootblock_mainboard_init();
if (CONFIG_BOOTBLOCK_CONSOLE) {

5
src/arch/arm/armv7/bootblock_simple.c
View File

@ -28,12 +28,15 @@
#include <halt.h>
#include <smp/node.h>
__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
void main(void)
{
const char *stage_name = "fallback/romstage";
void *entry;
bootblock_cpu_init();
bootblock_soc_init();
bootblock_mainboard_init();
#if CONFIG_BOOTBLOCK_CONSOLE

38
src/arch/arm/include/bootblock_common.h
View File

@ -1,15 +1,27 @@
#if CONFIG_CPU_HAS_BOOTBLOCK_INIT
void bootblock_cpu_init(void);
#else
static void __attribute__((unused)) bootblock_cpu_init(void)
{
}
#endif
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#if CONFIG_MAINBOARD_HAS_BOOTBLOCK_INIT
#ifndef __ARCH_BOOTBLOCK_COMMON_H
#define __ARCH_BOOTBLOCK_COMMON_H
/* These are defined as weak no-ops that can be overridden by mainboard/SoC. */
void bootblock_mainboard_init(void);
#else
static void __attribute__((unused)) bootblock_mainboard_init(void)
{
}
#endif
void bootblock_soc_init(void);
#endif /* __ARCH_BOOTBLOCK_COMMON_H */

2
src/cpu/allwinner/a10/bootblock.c
View File

@ -10,7 +10,7 @@
#include <arch/cache.h>
#include <bootblock_common.h>
void bootblock_cpu_init(void)
void bootblock_soc_init(void)
{
uint32_t sctlr;

6
src/cpu/armltd/cortex-a9/Kconfig
View File

@ -7,10 +7,4 @@ config CPU_ARMLTD_CORTEX_A9
if CPU_ARMLTD_CORTEX_A9
config BOOTBLOCK_CPU_INIT
string
default "cpu/armltd/cortex-a9/bootblock.c"
help
CPU/SoC-specific bootblock code.
endif

17
src/cpu/armltd/cortex-a9/bootblock.c
View File

@ -1,17 +0,0 @@
/*
* Copyright (C) 2013 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
void bootblock_cpu_init(void);
void bootblock_cpu_init(void)
{
}

2
src/cpu/ti/am335x/bootblock.c
View File

@ -22,7 +22,7 @@
#include <arch/cache.h>
#include <bootblock_common.h>
void bootblock_cpu_init(void)
void bootblock_soc_init(void)
{
uint32_t sctlr;

20
src/soc/qualcomm/ipq806x/Makefile.inc
View File

@ -1,3 +1,23 @@
##
## This file is part of the coreboot project.
##
## Copyright 2014 Google Inc.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
bootblock-y += bootblock.c
bootblock-y += cbfs.c
bootblock-y += clock.c
bootblock-y += gpio.c

24
src/soc/qualcomm/ipq806x/bootblock.c Normal file
View File

@ -0,0 +1,24 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <bootblock_common.h>
void bootblock_soc_init(void)
{
}

2
src/soc/samsung/exynos5250/bootblock.c
View File

@ -22,7 +22,7 @@
#include "clk.h"
#include "wakeup.h"
void bootblock_cpu_init(void)
void bootblock_soc_init(void)
{
/* kick off the multi-core timer.
* We want to do this as early as we can.

2
src/soc/samsung/exynos5420/bootblock.c
View File

@ -29,7 +29,7 @@
#define SRAM_SIZE 1
#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */
void bootblock_cpu_init(void)
void bootblock_soc_init(void)
{
/* kick off the multi-core timer.
* We want to do this as early as we can.