mb/prodrive/hermes: Clean up some cosmetics

Use lowercase for hex numbers, sort includes alphabetically and avoid
relying on indirect inclusion. Include `<intelblocks/gpio.h>` instead
of `<intelblocks/gpio_defs.h>`, as the latter implcitly relies on one
definition from `<soc/gpio.h>`. Also drop useless dsdt.asl and fix up
the indentation of some includes.

Tested with BUILD_TIMELESS=1, Prodrive Hermes remains identical.

Change-Id: I3aeb9a644cf33cb4b1987174f40ef0fc7daccfa9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2021-11-25 13:34:11 +01:00 committed by Felix Held
parent e81560c6cf
commit 0b697a2473
8 changed files with 25 additions and 26 deletions

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@ -7,22 +7,19 @@ DefinitionBlock(
ACPI_DSDT_REV_2, ACPI_DSDT_REV_2,
OEM_ID, OEM_ID,
ACPI_TABLE_CREATOR, ACPI_TABLE_CREATOR,
0x20110725 // OEM revision 0x20110725
) )
{ {
#include <acpi/dsdt_top.asl> #include <acpi/dsdt_top.asl>
#include <soc/intel/common/block/acpi/acpi/platform.asl> #include <soc/intel/common/block/acpi/acpi/platform.asl>
// global NVS and variables
#include <soc/intel/common/block/acpi/acpi/globalnvs.asl> #include <soc/intel/common/block/acpi/acpi/globalnvs.asl>
Scope (\_SB) { Scope (\_SB) {
Device (PCI0) { Device (PCI0) {
#include <soc/intel/common/block/acpi/acpi/northbridge.asl> #include <soc/intel/common/block/acpi/acpi/northbridge.asl>
#include <soc/intel/cannonlake/acpi/southbridge.asl> #include <soc/intel/cannonlake/acpi/southbridge.asl>
} }
} }
#include <southbridge/intel/common/acpi/sleepstates.asl> #include <southbridge/intel/common/acpi/sleepstates.asl>
} }

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@ -1,10 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <assert.h> #include <assert.h>
#include <device/pci_ops.h>
#include <delay.h>
#include <console/console.h> #include <console/console.h>
#include <crc_byte.h> #include <crc_byte.h>
#include <delay.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h> #include <device/smbus_host.h>
#include <soc/intel/common/block/smbus/smbuslib.h> #include <soc/intel/common/block/smbus/smbuslib.h>
#include <types.h> #include <types.h>

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@ -1,6 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <assert.h>
#include <soc/ramstage.h> #include <soc/ramstage.h>
#include <types.h>
union eeprom_dimm_layout { union eeprom_dimm_layout {
struct __packed { struct __packed {
@ -71,7 +73,7 @@ struct __packed eeprom_layout {
FSPM_UPD mupd; FSPM_UPD mupd;
}; };
union { union {
uint8_t RawFSPSUPD[0xC00]; uint8_t RawFSPSUPD[0xc00];
FSPS_UPD supd; FSPS_UPD supd;
}; };
union { union {
@ -82,7 +84,7 @@ struct __packed eeprom_layout {
char board_serial_number[HERMES_SERIAL_NUMBER_LENGTH]; char board_serial_number[HERMES_SERIAL_NUMBER_LENGTH];
uint8_t BootOrder[0x8c0]; uint8_t BootOrder[0x8c0];
union { union {
uint8_t RawBoardSetting[0xF8]; uint8_t RawBoardSetting[0xf8];
struct eeprom_board_settings BoardSettings; struct eeprom_board_settings BoardSettings;
}; };
union { union {
@ -92,7 +94,7 @@ struct __packed eeprom_layout {
}; };
_Static_assert(sizeof(FSPM_UPD) <= 0x600, "FSPM_UPD too big"); _Static_assert(sizeof(FSPM_UPD) <= 0x600, "FSPM_UPD too big");
_Static_assert(sizeof(FSPS_UPD) <= 0xC00, "FSPS_UPD too big"); _Static_assert(sizeof(FSPS_UPD) <= 0xc00, "FSPS_UPD too big");
_Static_assert(sizeof(struct eeprom_layout) == 0x2000, "EEPROM layout size mismatch"); _Static_assert(sizeof(struct eeprom_layout) == 0x2000, "EEPROM layout size mismatch");
bool eeprom_read_buffer(void *blob, size_t read_offset, size_t size); bool eeprom_read_buffer(void *blob, size_t read_offset, size_t size);

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@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <commonlib/helpers.h> #include <commonlib/helpers.h>
#include <intelblocks/gpio.h>
#include <soc/gpio.h> #include <soc/gpio.h>
#include <intelblocks/gpio_defs.h>
#include "gpio.h" #include "gpio.h"

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@ -21,7 +21,7 @@ const u32 cim_verb_data[] = {
AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */ AZALIA_PIN_CFG(0, 0x1c, 0x411111f0), /* CD audio - disabled */
AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */ AZALIA_PIN_CFG(0, 0x1d, 0x4004c601), /* BEEPIN */
AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */ AZALIA_PIN_CFG(0, 0x1e, 0x01452160), /* SPDIF-OUT */
AZALIA_PIN_CFG(0, 0x1f, 0x01C52170), /* SPDIF-IN */ AZALIA_PIN_CFG(0, 0x1f, 0x01c52170), /* SPDIF-IN */
/* Config for R02 and older */ /* Config for R02 and older */
AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */ AZALIA_PIN_CFG(0, 0x19, 0x02214c40), /* port F - front hp out */
@ -31,11 +31,11 @@ const u32 cim_verb_data[] = {
/* /*
* VerbTable: CFL Display Audio Codec * VerbTable: CFL Display Audio Codec
* Revision ID = 0xFF * Revision ID = 0xff
* Codec Vendor: 0x8086280B * Codec Vendor: 0x8086280b
*/ */
0x8086280B, 0x8086280b,
0xFFFFFFFF, 0xffffffff,
5, /* Number of 4 dword sets */ 5, /* Number of 4 dword sets */
AZALIA_SUBVENDOR(2, 0x80860101), AZALIA_SUBVENDOR(2, 0x80860101),

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@ -1,19 +1,19 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/cpu.h>
#include <acpi/acpigen.h> #include <acpi/acpigen.h>
#include <arch/cpu.h>
#include <bootstate.h>
#include <cbmem.h> #include <cbmem.h>
#include <console/console.h> #include <console/console.h>
#include <crc_byte.h> #include <crc_byte.h>
#include <bootstate.h>
#include <device/device.h> #include <device/device.h>
#include <device/dram/spd.h> #include <device/dram/spd.h>
#include <gpio.h> #include <gpio.h>
#include <intelblocks/gpio_defs.h> #include <intelblocks/gpio.h>
#include <intelblocks/pmclib.h> #include <intelblocks/pmclib.h>
#include <smbios.h>
#include <soc/gpio.h> #include <soc/gpio.h>
#include <types.h> #include <types.h>
#include <smbios.h>
#include "eeprom.h" #include "eeprom.h"
#include "gpio.h" #include "gpio.h"

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@ -9,19 +9,19 @@ static const struct cnl_mb_cfg baseboard_mem_cfg = {
/* Access memory info through SMBUS. */ /* Access memory info through SMBUS. */
.spd[0] = { .spd[0] = {
.read_type = READ_SMBUS, .read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA0} .spd_spec = {.spd_smbus_address = 0xa0}
}, },
.spd[1] = { .spd[1] = {
.read_type = READ_SMBUS, .read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA2} .spd_spec = {.spd_smbus_address = 0xa2}
}, },
.spd[2] = { .spd[2] = {
.read_type = READ_SMBUS, .read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA4} .spd_spec = {.spd_smbus_address = 0xa4}
}, },
.spd[3] = { .spd[3] = {
.read_type = READ_SMBUS, .read_type = READ_SMBUS,
.spd_spec = {.spd_smbus_address = 0xA6} .spd_spec = {.spd_smbus_address = 0xa6}
}, },
/* Baseboard uses 121, 81 and 100 rcomp resistors */ /* Baseboard uses 121, 81 and 100 rcomp resistors */

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@ -1,8 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <smbios.h> #include <smbios.h>
#include <types.h>
#include <string.h> #include <string.h>
#include <types.h>
#include "eeprom.h" #include "eeprom.h"