diff --git a/src/southbridge/amd/cimx/sb800/chip.h b/src/southbridge/amd/cimx/sb800/chip.h
index 2c2ce1ec13..f0ce0751c8 100644
--- a/src/southbridge/amd/cimx/sb800/chip.h
+++ b/src/southbridge/amd/cimx/sb800/chip.h
@@ -35,6 +35,7 @@
 struct southbridge_amd_cimx_sb800_config
 {
 	u32 boot_switch_sata_ide : 1;
+	u32 disconnect_pcib : 1;
 	u8  gpp_configuration;
 
 	/*
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index e01793607b..2125027083 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -401,7 +401,7 @@ static void sb800_enable(device_t dev)
 		 * 'PCIDisable' set to 1 to disable P2P bridge and enable PCI interface pins
 		 *              to function as GPIO {GPIO 35:0}.
 		 */
-		if (dev->enabled)
+		if (!sb_chip->disconnect_pcib && dev->enabled)
 			RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGEA, AccWidthUint8, ~BIT0, 0);
 		else
 			RWMEM(ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGEA, AccWidthUint8, ~BIT0, BIT0);