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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2004-11-24 21:12:20 +00:00
parent f439250355
commit 0bac237334
1 changed files with 14 additions and 1 deletions
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15
src/northbridge/motorola/mpc107/mpc107_northbridge.c
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@ -9,6 +9,13 @@
#include <cpu/cpu.h> #include <cpu/cpu.h>
#include "chip.h" #include "chip.h"
/*
* pci_domain_read_resources needs to create two resource regions,
* one for memory and one for I/O. These are required for the
* resource allocation code to function correctly. The regions should
* be large enough to hold all expected resources for all PCI
* devices.
*/
static void pci_domain_read_resources(device_t dev) static void pci_domain_read_resources(device_t dev)
{ {
struct resource *resource; struct resource *resource;
@ -26,6 +33,11 @@ static void pci_domain_read_resources(device_t dev)
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
} }
/*
* pci_domain_set_resources creates memory resources describing the
* fixed memory on the system. This is not actually used anywhere
* except when the linuxbios table is generated.
*/
static void pci_domain_set_resources(device_t dev) static void pci_domain_set_resources(device_t dev)
{ {
device_t mc_dev; device_t mc_dev;
@ -52,7 +64,8 @@ static void pci_domain_set_resources(device_t dev)
bank_enable = pci_read_config32(mc_dev, 0xa0); bank_enable = pci_read_config32(mc_dev, 0xa0);
/* Report the memory regions */ /* Report the memory regions */
idx = 10; idx = 10; /* Why does idx start at 10? */
for(i = 0; i < 8; i++) { for(i = 0; i < 8; i++) {
struct resource *res; struct resource *res;
/* Ignore banks that are not enabled */ /* Ignore banks that are not enabled */