mb/google/skyrim: Enable AP <-> D2 communication

Configure D2 I2C and Interrupt GPIOs during the early initialization.
Add devicetree configuration for D2 device and enable the required
config items.

BUG=b:214414776
TEST=Build

Signed-off-by: Jon Murphy <jpmurphy@google.com>
Change-Id: I57b6d0e9da9935596e54b8eab400440e518b4523
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62163
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>

src/mainboard/google/skyrim/Kconfig

@@ -26,6 +26,8 @@ config BOARD_SPECIFIC_OPTIONS
 	select ELOG_GSMI
 	select FW_CONFIG
 	select MAINBOARD_HAS_CHROMEOS
+	select MAINBOARD_HAS_I2C_TPM_CR50
+	select MAINBOARD_HAS_TPM2
 	select SOC_AMD_SABRINA
 	select SOC_AMD_COMMON_BLOCK_USE_ESPI
 
@@ -35,6 +37,14 @@ config CHROMEOS
 config DEVICETREE
 	default "variants/baseboard/devicetree.cb"
 
+config DRIVER_TPM_I2C_BUS
+	hex
+	default 0x03
+
+config DRIVER_TPM_I2C_ADDR
+	hex
+	default 0x50
+
 config FMDFILE
 	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd"
 

src/mainboard/google/skyrim/bootblock.c

@@ -5,7 +5,15 @@
 
 void bootblock_mainboard_early_init(void)
 {
-	/* TODO: Perform mainboard initialization */
+	size_t num_gpios, override_num_gpios;
+	const struct soc_amd_gpio *gpios, *override_gpios;
+
+	variant_tpm_gpio_table(&gpios, &num_gpios);
+	gpio_configure_pads(gpios, num_gpios);
+
+	variant_early_gpio_table(&gpios, &num_gpios);
+	variant_early_override_gpio_table(&override_gpios, &override_num_gpios);
+	gpio_configure_pads_with_override(gpios, num_gpios, override_gpios, override_num_gpios);
 }
 
 void bootblock_mainboard_init(void)

src/mainboard/google/skyrim/variants/baseboard/devicetree.cb

@@ -128,5 +128,12 @@ chip soc/amd/sabrina
 	device ref i2c_0 on end
 	device ref i2c_1 on end
 	device ref i2c_2 on end
-	device ref i2c_3 on end
+	device ref i2c_3 on
+		chip drivers/i2c/tpm
+			register "hid" = ""GOOG0005""
+			register "desc" = ""Ti50 TPM""
+			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_18)"
+			device i2c 50 on end
+		end
+	end
 end	# chip soc/amd/sabrina

src/mainboard/google/skyrim/variants/baseboard/gpio.c

@@ -141,6 +141,15 @@ static const struct soc_amd_gpio base_gpio_table[] = {
 	PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE),
 };
 
+static const struct soc_amd_gpio tpm_gpio_table[] = {
+	/* I2C3_SCL */
+	PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE),
+	/* I2C3_SDA */
+	PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE),
+	/* GSC_SOC_INT_L */
+	PAD_INT(GPIO_18, PULL_NONE, EDGE_LOW, STATUS_DELIVERY),
+};
+
 /* GPIO configuration for sleep */
 static const struct soc_amd_gpio sleep_gpio_table[] = {
 	/* TODO: Fill sleep gpio configuration */
@@ -151,6 +160,11 @@ static const struct soc_amd_gpio bootblock_gpio_table[] = {
 	/* TODO: Fill bootblock gpio configuration */
 };
 
+/* Early GPIO configuration */
+static const struct soc_amd_gpio early_gpio_table[] = {
+	/* TODO: Fill early gpio configuration */
+};
+
 __weak void variant_base_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
 {
 	*size = ARRAY_SIZE(base_gpio_table);
@@ -169,8 +183,26 @@ __weak void variant_bootblock_gpio_table(const struct soc_amd_gpio **gpio, size_
 	*gpio = bootblock_gpio_table;
 }
 
+__weak void variant_early_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
+{
+	*size = ARRAY_SIZE(early_gpio_table);
+	*gpio = early_gpio_table;
+}
+
+__weak void variant_early_override_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
+{
+	*size = 0;
+	*gpio = NULL;
+}
+
 __weak void variant_sleep_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
 {
 	*size = ARRAY_SIZE(sleep_gpio_table);
 	*gpio = sleep_gpio_table;
 }
+
+__weak void variant_tpm_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
+{
+	*size = ARRAY_SIZE(tpm_gpio_table);
+	*gpio = tpm_gpio_table;
+}

src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h

@@ -22,7 +22,16 @@ void variant_override_gpio_table(const struct soc_amd_gpio **gpio, size_t *size)
 /* This function provides GPIO init in bootblock. */
 void variant_bootblock_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
 
+/* This function provides early GPIO init in early bootblock or psp. */
+void variant_early_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
+
+/* This function allows variant to override any early GPIO init in early bootblock or psp. */
+void variant_early_override_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
+
 /* This function provides GPIO settings before entering sleep. */
 void variant_sleep_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
 
+/* This function provides GPIO settings for TPM i2c bus. */
+void variant_tpm_gpio_table(const struct soc_amd_gpio **gpio, size_t *size);
+
 #endif /* __BASEBOARD_VARIANTS_H__ */