device/cardbus: Fix use of PCI_CB_BRIDGE_CONTROL

Read-modify-write needs to access the same register. Numerically
both used defines are 0x3e, while register implementations are
not identical but only similar.

Change-Id: I9348b855320f86868e2d3ef76d3b8d7a4ab7fae0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Michael Niewöhner
This commit is contained in:
Kyösti Mälkki 2019-09-21 16:21:47 +03:00
parent 382e2167cc
commit 0bca050f2c
1 changed files with 1 additions and 1 deletions

View File

@ -161,7 +161,7 @@ void cardbus_enable_resources(struct device *dev)
/* Error check */
ctrl |= (PCI_CB_BRIDGE_CTL_PARITY | PCI_CB_BRIDGE_CTL_SERR);
printk(BIOS_DEBUG, "%s bridge ctrl <- %04x\n", dev_path(dev), ctrl);
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
pci_write_config16(dev, PCI_CB_BRIDGE_CONTROL, ctrl);
pci_dev_enable_resources(dev);
}