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ipq806x: clear the RPM initialization Acknowledge bit 

The RPM initialization Acknowledge is cleared by writing 1
into bit-10 of the RPM_INT_ACK register.

The existing code got it wrong and is writing zero to that bit.

BRANCH=storm
BUG=chrome-os-partner:39231
TEST=with this patch and an RPM firmware update, an SP4 device
     survived more than 1000 reboots in a row.

Change-Id: Ibba296ed0571ad9403a0c51c7f82f07f185b4e83
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 13b4a0f093ba652ad6bccdfc4b3686c0741c6fe7
Original-Change-Id: I39e6ea50e0f66b4af68bdb868dd4437c34bb4524
Original-Signed-off-by: Viswanath Kraleti <vkraleti@codeaurora.org>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/266969
Original-Reviewed-by: Manoj Juneja <mjuneja@qti.qualcomm.com>
Reviewed-on: http://review.coreboot.org/10310
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Sourabh Banerjee 2015-04-24 22:54:18 +05:30 committed by Patrick Georgi
parent 641529b067
commit 0bd22ce82c
1 changed files with 5 additions and 1 deletions
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6
src/soc/qualcomm/ipq806x/blobs_init.c
View File

@ -131,7 +131,11 @@ void start_rpm(void)
printk(BIOS_INFO, "Starting RPM\n");
/* Clear 'ready' indication. */
write32(RPM_INT_ACK, read32(RPM_INT_ACK) & ~ready_mask);
/*
* RPM_INT_ACK is clear-on-write type register,
* read-modify-write is not recommended.
*/
write32(RPM_INT_ACK, ready_mask);
/* Set RPM entry address */
write32(RPM_SIGNAL_ENTRY, load_addr);