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intel/common: Add SMBIOS memory width 

Add SMBIOS symbols to define the memory width.  Update the Intel common
code to display the memory width and provide the memory width to SMBIOS.
Also display the memory frequency, size and bus width in decimal.

BRANCH=none
BUG=None
TEST=None

Change-Id: I67b814d79fdbbf6ce65ac6b4a8282ab15fb91369
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0e59c7260afd180f3adcbeda7cef1b9eca3ed846
Original-Change-Id: Ibd26812c2aad4deaab62111b1e018be69c4faa7b
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/282115
Original-Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11032
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy 2015-06-26 11:15:42 -07:00 committed by Patrick Georgi
parent caa5149b1e
commit 0be6d93959
2 changed files with 74 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
src/include/smbios.h
View File

@ -76,6 +76,48 @@ const char *smbios_mainboard_family(void);
#define MEMORY_TYPE_DETAIL_REGISTERED (1 << 13)
#define MEMORY_TYPE_DETAIL_UNBUFFERED (1 << 14)
typedef enum {
MEMORY_BUS_WIDTH_8 = 0,
MEMORY_BUS_WIDTH_16 = 1,
MEMORY_BUS_WIDTH_32 = 2,
MEMORY_BUS_WIDTH_64 = 3,
MEMORY_BUS_WIDTH_128 = 4,
MEMORY_BUS_WIDTH_256 = 5,
MEMORY_BUS_WIDTH_512 = 6,
MEMORY_BUS_WIDTH_1024 = 7,
MEMORY_BUS_WIDTH_MAX = 7,
} smbios_memory_bus_width;
typedef enum {
MEMORY_DEVICE_OTHER = 0x01,
MEMORY_DEVICE_UNKNOWN = 0x02,
MEMORY_DEVICE_DRAM = 0x03,
MEMORY_DEVICE_EDRAM = 0x04,
MEMORY_DEVICE_VRAM = 0x05,
MEMORY_DEVICE_SRAM = 0x06,
MEMORY_DEVICE_RAM = 0x07,
MEMORY_DEVICE_ROM = 0x08,
MEMORY_DEVICE_FLASH = 0x09,
MEMORY_DEVICE_EEPROM = 0x0A,
MEMORY_DEVICE_FEPROM = 0x0B,
MEMORY_DEVICE_EPROM = 0x0C,
MEMORY_DEVICE_CDRAM = 0x0D,
MEMORY_DEVICE_3DRAM = 0x0E,
MEMORY_DEVICE_SDRAM = 0x0F,
MEMORY_DEVICE_SGRAM = 0x10,
MEMORY_DEVICE_RDRAM = 0x11,
MEMORY_DEVICE_DDR = 0x12,
MEMORY_DEVICE_DDR2 = 0x13,
MEMORY_DEVICE_DDR2_FB_DIMM = 0x14,
MEMORY_DEVICE_DDR3 = 0x18,
MEMORY_DEVICE_DBD2 = 0x19,
MEMORY_DEVICE_DDR4 = 0x1A,
MEMORY_DEVICE_LPDDR = 0x1B,
MEMORY_DEVICE_LPDDR2 = 0x1C,
MEMORY_DEVICE_LPDDR3 = 0x1D,
MEMORY_DEVICE_LPDDR4 = 0x1E,
} smbios_memory_device_type;
typedef enum {
MEMORY_FORMFACTOR_OTHER = 0x01,
MEMORY_FORMFACTOR_UNKNOWN = 0x02,

34
src/soc/intel/common/romstage.c
View File

@ -34,6 +34,7 @@
#include <memory_info.h>
#include <reset.h>
#include <romstage_handoff.h>
#include <smbios.h>
#include <soc/intel/common/mrc_cache.h>
#include <soc/intel/common/util.h>
#include <soc/pei_wrapper.h>
@ -273,8 +274,10 @@ __attribute__((weak)) void mainboard_save_dimm_info(
memory_info_hob->Revision);
printk(BIOS_DEBUG, " 0x%02x: MemoryType\n",
memory_info_hob->MemoryType);
printk(BIOS_DEBUG, " 0x%04x: MemoryFrequencyInMHz\n",
printk(BIOS_DEBUG, " %d: MemoryFrequencyInMHz\n",
memory_info_hob->MemoryFrequencyInMHz);
printk(BIOS_DEBUG, " %d: DataWidth in bits\n",
memory_info_hob->DataWidth);
printk(BIOS_DEBUG, " 0x%02x: ErrorCorrectionType\n",
memory_info_hob->ErrorCorrectionType);
printk(BIOS_DEBUG, " 0x%02x: ChannelCount\n",
@ -293,7 +296,7 @@ __attribute__((weak)) void mainboard_save_dimm_info(
printk(BIOS_DEBUG, " DIMM %d\n", dimm);
printk(BIOS_DEBUG, " 0x%02x: DimmId\n",
dimm_info->DimmId);
printk(BIOS_DEBUG, " 0x%02x: SizeInMb\n",
printk(BIOS_DEBUG, " %d: SizeInMb\n",
dimm_info->SizeInMb);
}
}
@ -333,6 +336,33 @@ __attribute__((weak)) void mainboard_save_dimm_info(
channel_info->ChannelId;
mem_info->dimm[index].dimm_num =
dimm_info->DimmId;
switch (memory_info_hob->DataWidth) {
default:
case 8:
mem_info->dimm[index].bus_width =
MEMORY_BUS_WIDTH_8;
break;
case 16:
mem_info->dimm[index].bus_width =
MEMORY_BUS_WIDTH_16;
break;
case 32:
mem_info->dimm[index].bus_width =
MEMORY_BUS_WIDTH_32;
break;
case 64:
mem_info->dimm[index].bus_width =
MEMORY_BUS_WIDTH_64;
break;
case 128:
mem_info->dimm[index].bus_width =
MEMORY_BUS_WIDTH_128;
break;
}
index++;
}
}