cpu/intel/microcode: Add caching layer in intel_microcode_find
Cache the found microcode for faster subsequent accesses. Change-Id: Ic40d57964600f8f20ddb26c7d1691b043fd89f29 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49896 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -119,13 +119,16 @@ uint32_t get_microcode_checksum(const void *microcode)
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const void *intel_microcode_find(void)
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{
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const struct microcode *ucode_updates;
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static const struct microcode *ucode_updates;
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size_t microcode_len;
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u32 eax;
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u32 pf, rev, sig, update_size;
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unsigned int x86_model, x86_family;
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msr_t msr;
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if (ucode_updates)
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return ucode_updates;
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ucode_updates = cbfs_map(MICROCODE_CBFS_FILE, µcode_len);
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if (ucode_updates == NULL)
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return NULL;
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@ -173,6 +176,8 @@ const void *intel_microcode_find(void)
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microcode_len -= update_size;
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}
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ucode_updates = NULL;
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return NULL;
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}
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@ -6,8 +6,10 @@
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void intel_update_microcode_from_cbfs(void);
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/* Find a microcode that matches the revision and platform family returning
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* NULL if none found. */
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* NULL if none found. The found microcode is cached for faster access on
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* subsequent calls of this function. */
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const void *intel_microcode_find(void);
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/* It is up to the caller to determine if parallel loading is possible as
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* well as ensuring the microcode matches the family and revision (i.e. with
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* intel_microcode_find()). */
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