intel/fsp1_1: Don't consume FSP_SMBIOS_MEMORY_INFO_HOB in S3 resume path
FSP doesn't publish smbios_memory_info_guid during S3 resume path. Hence it's recommended to skip consuming this HOB in S3 resume. Bug=none Branch=none TEST=Build and boot Lars system with this patch. Change-Id: I321751523b1ea3326ffc23f4d4c53d5362482674 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/20540 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -101,6 +101,7 @@ void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
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/* Entry from the mainboard. */
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/* Entry from the mainboard. */
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void romstage_common(struct romstage_params *params)
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void romstage_common(struct romstage_params *params)
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{
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{
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bool s3wake;
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struct region_device rdev;
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struct region_device rdev;
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struct pei_data *pei_data;
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struct pei_data *pei_data;
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@ -110,11 +111,10 @@ void romstage_common(struct romstage_params *params)
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pei_data = params->pei_data;
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pei_data = params->pei_data;
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pei_data->boot_mode = params->power_state->prev_sleep_state;
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pei_data->boot_mode = params->power_state->prev_sleep_state;
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s3wake = params->power_state->prev_sleep_state == ACPI_S3;
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#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT)
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if (IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) && !s3wake)
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if (params->power_state->prev_sleep_state != ACPI_S3)
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boot_count_increment();
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boot_count_increment();
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#endif
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/* Perform remaining SOC initialization */
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/* Perform remaining SOC initialization */
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soc_pre_ram_init(params);
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soc_pre_ram_init(params);
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@ -168,7 +168,8 @@ void romstage_common(struct romstage_params *params)
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}
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}
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/* Save DIMM information */
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/* Save DIMM information */
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mainboard_save_dimm_info(params);
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if (!s3wake)
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mainboard_save_dimm_info(params);
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/* Create romstage handof information */
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/* Create romstage handof information */
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if (romstage_handoff_init(
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if (romstage_handoff_init(
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