src: Remove unused include device/pnp_def.h

Change-Id: Ibb7ce42588510dc5ffb04c950c4c8c64e9a2fa37
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31238
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>

src/mainboard/adi/rcc-dff/romstage.c

@@ -17,7 +17,6 @@
 
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <southbridge/intel/fsp_rangeley/soc.h>

src/mainboard/advansus/a785e-i/romstage.c

@@ -22,7 +22,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/amd/bimini_fam10/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/amd/db-ft3b-lc/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>

src/mainboard/amd/inagua/romstage.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/smsc/kbc1100/kbc1100.h>
 

src/mainboard/amd/lamar/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -26,7 +26,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/amd/olivehill/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <southbridge/amd/agesa/hudson/hudson.h>

src/mainboard/amd/olivehillplus/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>

src/mainboard/amd/persimmon/romstage.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>

src/mainboard/amd/serengeti_cheetah_fam10/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/amd/south_station/romstage.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f81865f/f81865f.h>

src/mainboard/amd/thatcher/romstage.c

@@ -18,7 +18,6 @@
 #include <device/pci_def.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <southbridge/amd/agesa/hudson/hudson.h>

src/mainboard/amd/tilapia_fam10/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/amd/torpedo/romstage.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/smsc/kbc1100/kbc1100.h>
 

src/mainboard/aopen/dxplplusu/bootblock.c

@@ -14,7 +14,6 @@
  */
 
 #include <bootblock_common.h>
-#include <device/pnp_def.h>
 #include <superio/smsc/lpc47m10x/lpc47m10x.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, LPC47M10X2_SP1)

src/mainboard/apple/macbook21/romstage.c

@@ -21,7 +21,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/intel/romstage.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>

src/mainboard/apple/macbookair4_2/romstage.c

@@ -16,7 +16,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>

src/mainboard/asrock/g41c-gs/romstage.c

@@ -26,7 +26,6 @@
 #include <superio/winbond/common/winbond.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <northbridge/intel/x4x/iomap.h>
-#include <device/pnp_def.h>
 
 #define SERIAL_DEV_R2 PNP_DEV(0x2e, NCT6776_SP1)
 #define SERIAL_DEV_R1 PNP_DEV(0x2e, W83627DHG_SP1)

src/mainboard/asrock/imb-a180/romstage.c

@@ -18,7 +18,6 @@
 #include <device/pci_def.h>
 #include <arch/acpi.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 
 #include <northbridge/amd/agesa/state_machine.h>

src/mainboard/asus/am1i-a/romstage.c

@@ -16,7 +16,6 @@
  */
 
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <southbridge/amd/common/amd_defs.h>

src/mainboard/asus/kcma-d8/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <romstage_handoff.h>

src/mainboard/asus/kfsn4-dre/romstage.c

@@ -26,7 +26,6 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/asus/kgpe-d16/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <romstage_handoff.h>

src/mainboard/asus/m4a78-em/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/asus/m4a785-m/romstage.c

@@ -26,7 +26,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/asus/m5a88-v/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/asus/p2b-ds/romstage.c

@@ -15,7 +15,6 @@
  */
 
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>

src/mainboard/asus/p2b-ls/romstage.c

@@ -15,7 +15,6 @@
  */
 
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>

src/mainboard/asus/p2b/romstage.c

@@ -15,7 +15,6 @@
  */
 
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>

src/mainboard/asus/p3b-f/romstage.c

@@ -15,7 +15,6 @@
  */
 
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <southbridge/intel/i82371eb/i82371eb.h>
 #include <northbridge/intel/i440bx/raminit.h>

src/mainboard/asus/p5gc-mx/romstage.c

@@ -21,7 +21,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <superio/winbond/common/winbond.h>

src/mainboard/asus/p5qpl-am/romstage.c

@@ -24,7 +24,6 @@
 #include <superio/winbond/w83627dhg/w83627dhg.h>
 #include <superio/winbond/common/winbond.h>
 #include <northbridge/intel/x4x/iomap.h>
-#include <device/pnp_def.h>
 #include <halt.h>
 #include <cpu/intel/speedstep.h>
 #include <cpu/x86/msr.h>

src/mainboard/avalue/eax-785e/romstage.c

@@ -23,7 +23,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/bap/ode_e21XX/romstage.c

@@ -17,7 +17,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>

src/mainboard/biostar/a68n_5200/romstage.c

@@ -19,7 +19,6 @@
 #include <string.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <southbridge/amd/agesa/hudson/hudson.h>

src/mainboard/biostar/am1ml/romstage.c

@@ -15,7 +15,6 @@
  */
 
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <commonlib/loglevel.h>
 #include <northbridge/amd/agesa/state_machine.h>

src/mainboard/foxconn/d41s/romstage.c

@@ -16,7 +16,6 @@
  */
 
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>
 #include <northbridge/intel/pineview/pineview.h>
 #include <superio/ite/common/ite.h>

src/mainboard/getac/p470/romstage.c

@@ -18,7 +18,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <pc80/mc146818rtc.h>

src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c

@@ -20,7 +20,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <superio/ite/it8718f/it8718f.h>

src/mainboard/gigabyte/ga-g41m-es2l/romstage.c

@@ -17,7 +17,6 @@
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>
 #include <southbridge/intel/common/gpio.h>

src/mainboard/gigabyte/ma785gm/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/gigabyte/ma785gmt/romstage.c

@@ -22,7 +22,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/gigabyte/ma78gm/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/google/butterfly/romstage.c

@@ -19,7 +19,6 @@
 #include <timestamp.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>

src/mainboard/google/link/romstage.c

@@ -20,7 +20,6 @@
 #include <arch/io.h>
 #include <device/pci.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <console/console.h>

src/mainboard/google/parrot/romstage.c

@@ -19,7 +19,6 @@
 #include <timestamp.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>

src/mainboard/google/stout/romstage.c

@@ -19,7 +19,6 @@
 #include <timestamp.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <console/console.h>

src/mainboard/hp/abm/romstage.c

@@ -15,7 +15,6 @@
  */
 
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <southbridge/amd/agesa/hudson/hudson.h>
 #include <superio/nuvoton/common/nuvoton.h>

src/mainboard/hp/compaq_8200_elite_sff/romstage.c

@@ -20,7 +20,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <superio/nuvoton/npcd378/npcd378.h>
 #include <superio/nuvoton/common/nuvoton.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>

src/mainboard/hp/dl165_g6_fam10/romstage.c

@@ -29,7 +29,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include "option_table.h"
 #include <console/console.h>

src/mainboard/iei/kino-780am2-fam10/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/intel/d510mo/romstage.c

@@ -15,7 +15,6 @@
  */
 
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <southbridge/intel/i82801gx/i82801gx.h>
 #include <northbridge/intel/pineview/pineview.h>
 #include <superio/winbond/w83627thg/w83627thg.h>

src/mainboard/intel/d945gclf/romstage.c

@@ -18,7 +18,6 @@
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <superio/smsc/lpc47m15x/lpc47m15x.h>
 #include <console/console.h>

src/mainboard/intel/dg41wv/romstage.c

@@ -24,7 +24,6 @@
 #include <superio/winbond/w83627dhg/w83627dhg.h>
 #include <superio/winbond/common/winbond.h>
 #include <northbridge/intel/x4x/iomap.h>
-#include <device/pnp_def.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627DHG_SP1)
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)

src/mainboard/intel/emeraldlake2/romstage.c

@@ -19,7 +19,6 @@
 #include <timestamp.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <superio/smsc/sio1007/chip.h>

src/mainboard/intel/littleplains/romstage.c

@@ -17,7 +17,6 @@
 
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <southbridge/intel/fsp_rangeley/soc.h>

src/mainboard/intel/mohonpeak/romstage.c

@@ -17,7 +17,6 @@
 
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <southbridge/intel/fsp_rangeley/soc.h>

src/mainboard/jetway/nf81-t56n-lf/romstage.c

@@ -14,7 +14,6 @@
  * GNU General Public License for more details.
  */
 
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/fintek/common/fintek.h>
 #include <superio/fintek/f71869ad/f71869ad.h>

src/mainboard/jetway/pa78vm5/romstage.c

@@ -26,7 +26,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/kontron/ktqm77/romstage.c

@@ -18,7 +18,6 @@
 #include <string.h>
 #include <timestamp.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>

src/mainboard/lenovo/l520/romstage.c

@@ -17,7 +17,6 @@
 
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>

src/mainboard/lenovo/s230u/romstage.c

@@ -19,7 +19,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>

src/mainboard/lenovo/thinkcentre_a58/romstage.c

@@ -23,7 +23,6 @@
 #include <cpu/intel/romstage.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>
 #include <northbridge/intel/x4x/iomap.h>
-#include <device/pnp_def.h>
 
 #define SERIAL_DEV PNP_DEV(0x2e, SMSCSUPERIO_SP1)
 #define LPC_DEV PCI_DEV(0, 0x1f, 0)

src/mainboard/lenovo/x1_carbon_gen1/romstage.c

@@ -22,7 +22,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <console/console.h>

src/mainboard/lenovo/x201/romstage.c

@@ -22,7 +22,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <lib.h>
 #include <romstage_handoff.h>

src/mainboard/lenovo/x220/romstage.c

@@ -21,7 +21,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>

src/mainboard/lenovo/x230/romstage.c

@@ -21,7 +21,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>

src/mainboard/lippert/frontrunner-af/romstage.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/smsc/smscsuperio/smscsuperio.h>
 

src/mainboard/lippert/toucan-af/romstage.c

@@ -13,7 +13,6 @@
  * GNU General Public License for more details.
  */
 
-#include <device/pnp_def.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <superio/winbond/common/winbond.h>
 #include <superio/winbond/w83627dhg/w83627dhg.h>

src/mainboard/msi/ms9652_fam10/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/packardbell/ms2290/romstage.c

@@ -22,7 +22,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <lib.h>
 #include <romstage_handoff.h>

src/mainboard/pcengines/apu2/romstage.c

@@ -18,7 +18,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp.h>
-#include <device/pnp_def.h>
 #include <arch/cpu.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>

src/mainboard/roda/rk886ex/romstage.c

@@ -20,7 +20,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <arch/acpi.h>
 #include <pc80/mc146818rtc.h>

src/mainboard/samsung/lumpy/romstage.c

@@ -19,7 +19,6 @@
 #include <timestamp.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <cbfs.h>
 #include <arch/acpi.h>

src/mainboard/samsung/stumpy/romstage.c

@@ -19,7 +19,6 @@
 #include <timestamp.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
 #include <arch/acpi.h>

src/mainboard/sapphire/pureplatinumh61/romstage.c

@@ -19,7 +19,6 @@
 #include <arch/byteorder.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>

src/mainboard/supermicro/h8dmr_fam10/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/supermicro/h8qme_fam10/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/supermicro/h8scm_fam10/romstage.c

@@ -25,7 +25,6 @@
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/tyan/s2912_fam10/romstage.c

@@ -24,7 +24,6 @@
 #include <device/pci_ids.h>
 #include <arch/io.h>
 #include <arch/cpu.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <console/console.h>
 #include <timestamp.h>

src/mainboard/via/epia-m850/romstage.c

@@ -20,7 +20,6 @@
 #include <stdint.h>
 #include <device/pci_def.h>
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 #include <lib.h>
 #include <cpu/x86/bist.h>

src/northbridge/intel/fsp_rangeley/port_access.c

@@ -19,7 +19,6 @@
 #include <stdint.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include "northbridge.h"
 

src/northbridge/intel/gm45/pcie.c

@@ -19,7 +19,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <console/console.h>
 
 #include "gm45.h"

src/northbridge/intel/gm45/pm.c

@@ -19,7 +19,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/msr.h>
 #include <cpu/intel/speedstep.h>
 

src/northbridge/intel/gm45/raminit.c

@@ -19,7 +19,6 @@
 #include <arch/cpu.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <device/device.h>
 #include <spd.h>
 #include <console/console.h>

src/northbridge/intel/gm45/thermal.c

@@ -19,7 +19,6 @@
 #include <string.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <spd.h>
 #include "delay.h"
 

src/southbridge/intel/fsp_rangeley/romstage.c

@@ -20,7 +20,6 @@
 #include <timestamp.h>
 #include <arch/io.h>
 #include <device/pci_def.h>
-#include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <cbmem.h>
 #include <console/console.h>

src/superio/ite/it8772f/early_init.c

@@ -15,7 +15,6 @@
  */
 
 #include <arch/io.h>
-#include <device/pnp_def.h>
 
 #include "it8772f.h"
 

src/superio/winbond/w83627dhg/early_serial.c

@@ -16,7 +16,6 @@
  */
 
 #include <arch/io.h>
-#include <device/pnp_def.h>
 #include <stdint.h>
 #include "w83627dhg.h"