mb/google/volteer/var/terrador: Update gpio settings for Proto2

Based on latest schematic and gpio table of terrador,
update gpio settings for terrador Proto2.

BUG=b:151978872
TEST=FW_NAME=terrador emerge-volteer coreboot chromeos-bootimage

Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: I64b4fcbaabc487206d14d794af319e6df6f99581
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44164
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
David Wu 2020-08-04 16:24:50 +08:00 committed by Tim Wawrzynczak
parent c7fe0bd8d6
commit 0c1879ff38
1 changed files with 4 additions and 10 deletions

View File

@ -20,17 +20,13 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1),
/* A18 : DDSP_HPDB ==> HDMI_HPD */ /* A18 : DDSP_HPDB ==> HDMI_HPD */
PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
/* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */
PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1),
/* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */
PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1),
/* A21 : DDPC_CTRCLK ==> EN_FP_PWR */ /* A21 : DDPC_CTRCLK ==> EN_FP_PWR */
PAD_CFG_GPO(GPP_A21, 1, DEEP), PAD_CFG_GPO(GPP_A21, 1, DEEP),
/* A22 : DDPC_CTRLDATA ==> EN_HDMI_PWR */ /* A22 : DDPC_CTRLDATA ==> EN_HDMI_PWR */
PAD_CFG_GPO(GPP_A22, 1, DEEP), PAD_CFG_GPO(GPP_A22, 1, DEEP),
/* B2 : VRALERT# ==> NC */ /* B2 : VRALERT# ==> EN_PP3300_SSD */
PAD_NC(GPP_B2, NONE), PAD_CFG_GPO(GPP_B2, 1, DEEP),
/* B7 : ISH_12C1_SDA ==> ISH_I2C1_SENSOR_SDA */ /* B7 : ISH_12C1_SDA ==> ISH_I2C1_SENSOR_SDA */
PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
/* B8 : ISH_I2C1_SCL ==> ISH_I2C1_SENSOR_SCL */ /* B8 : ISH_I2C1_SCL ==> ISH_I2C1_SENSOR_SCL */
@ -54,10 +50,6 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_GPO(GPP_C0, 1, DEEP), PAD_CFG_GPO(GPP_C0, 1, DEEP),
/* C2 : SMBALERT# ==> GPP_C2_STRAP */ /* C2 : SMBALERT# ==> GPP_C2_STRAP */
PAD_NC(GPP_C2, DN_20K), PAD_NC(GPP_C2, DN_20K),
/* C3 : SML0CLK ==> USB4_SMB_SCL */
PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
/* C4 : SML0DATA ==> USB4_SMB_SDA */
PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
/* C5 : SML0ALERT# ==> USB_SMB_INT_L_BOOT_STRAP0 */ /* C5 : SML0ALERT# ==> USB_SMB_INT_L_BOOT_STRAP0 */
PAD_NC(GPP_C5, DN_20K), PAD_NC(GPP_C5, DN_20K),
/* C7 : SML1DATA ==> EN_USI_CHARGE */ /* C7 : SML1DATA ==> EN_USI_CHARGE */
@ -200,6 +192,8 @@ static const struct pad_config early_gpio_table[] = {
/* A17 : DDSP_HPDC ==> MEM_CH_SEL */ /* A17 : DDSP_HPDC ==> MEM_CH_SEL */
PAD_CFG_GPI(GPP_A17, NONE, DEEP), PAD_CFG_GPI(GPP_A17, NONE, DEEP),
/* B2 : VRALERT# ==> EN_PP3300_SSD */
PAD_CFG_GPO(GPP_B2, 1, DEEP),
/* B11 : PMCALERT# ==> PCH_WP_OD */ /* B11 : PMCALERT# ==> PCH_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP), PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP),
/* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */ /* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */