mb/lenovo/x230: Remove superfluous comments related to PCI devices

Since all devicetrees from lenovo/x230 are using the reference names for
PCI devices now, remove the equivalent comments documenting their
function.

Change-Id: Ia06f976ef1439377ff22149044feaa3463d2aeb8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79964
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
This commit is contained in:
Felix Singer 2024-01-13 22:57:12 +01:00 committed by Felix Singer
parent f02e9e87b4
commit 0c359e2405
3 changed files with 32 additions and 32 deletions

View File

@ -19,9 +19,9 @@ chip northbridge/intel/sandybridge
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x21fa inherit subsystemid 0x17aa 0x21fa inherit
device ref host_bridge on end # host bridge device ref host_bridge on end
device ref peg10 off end # PCIe Bridge for discrete graphics device ref peg10 off end
device ref igd on end # vga controller device ref igd on end
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
# GPI routing # GPI routing
@ -52,33 +52,33 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005" register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0x2005" register "spi_lvscc" = "0x2005"
device ref xhci on end # USB 3.0 Controller device ref xhci on end
device ref mei1 on end # Management Engine Interface 1 device ref mei1 on end
device ref mei2 off end # Management Engine Interface 2 device ref mei2 off end
device ref me_ide_r off end # Management Engine IDE-R device ref me_ide_r off end
device ref me_kt off end # Management Engine KT device ref me_kt off end
device ref gbe on device ref gbe on
subsystemid 0x17aa 0x21f3 subsystemid 0x17aa 0x21f3
end # Intel Gigabit Ethernet end
device ref ehci2 on end # USB2 EHCI #2 device ref ehci2 on end
device ref hda on end # High Definition Audio device ref hda on end
device ref pcie_rp1 on device ref pcie_rp1 on
chip drivers/ricoh/rce822 chip drivers/ricoh/rce822
register "sdwppol" = "1" register "sdwppol" = "1"
register "disable_mask" = "0x87" register "disable_mask" = "0x87"
device pci 00.0 on end device pci 00.0 on end
end end
end # PCIe Port #1 end
device ref pcie_rp2 on end # PCIe Port #2 device ref pcie_rp2 on end
device ref pcie_rp3 off end # PCIe Port #3 device ref pcie_rp3 off end
device ref pcie_rp4 off end # PCIe Port #4 device ref pcie_rp4 off end
device ref pcie_rp5 off end # PCIe Port #5 device ref pcie_rp5 off end
device ref pcie_rp6 off end # PCIe Port #6 device ref pcie_rp6 off end
device ref pcie_rp7 off end # PCIe Port #7 device ref pcie_rp7 off end
device ref pcie_rp8 off end # PCIe Port #8 device ref pcie_rp8 off end
device ref ehci1 on end # USB2 EHCI #1 device ref ehci1 on end
device ref pci_bridge off end # PCI bridge device ref pci_bridge off end
device ref lpc on #LPC bridge device ref lpc on
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
device pnp ff.1 on end # dummy device pnp ff.1 on end # dummy
register "backlight_enable" = "true" register "backlight_enable" = "true"
@ -130,8 +130,8 @@ chip northbridge/intel/sandybridge
register "wwan_gpio_num" = "70" register "wwan_gpio_num" = "70"
register "wwan_gpio_lvl" = "0" register "wwan_gpio_lvl" = "0"
end end
end # LPC bridge end
device ref sata1 on end # SATA Controller 1 device ref sata1 on end
device ref smbus on device ref smbus on
# eeprom, 8 virtual devices, same chip # eeprom, 8 virtual devices, same chip
chip drivers/i2c/at24rf08c chip drivers/i2c/at24rf08c
@ -144,9 +144,9 @@ chip northbridge/intel/sandybridge
device i2c 5e on end device i2c 5e on end
device i2c 5f on end device i2c 5f on end
end end
end # SMBus end
device ref sata2 off end # SATA Controller 2 device ref sata2 off end
device ref thermal on end # Thermal device ref thermal on end
end end
end end
end end

View File

@ -5,13 +5,13 @@ chip northbridge/intel/sandybridge
register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }" register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
device ref pcie_rp3 on device ref pcie_rp3 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8" smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end # PCIe Port #3 (expresscard) end
device ref lpc on # LPC bridge device ref lpc on
chip ec/lenovo/h8 chip ec/lenovo/h8
register "eventa_enable" = "0x01" register "eventa_enable" = "0x01"
device pnp ff.2 on end device pnp ff.2 on end
end end
end # LPC Controller end
end end
end end
end end

View File

@ -19,7 +19,7 @@ chip northbridge/intel/sandybridge
# Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA) # Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA)
register "sata_port_map" = "0x3" register "sata_port_map" = "0x3"
device ref lpc on # LPC bridge device ref lpc on
chip ec/lenovo/h8 chip ec/lenovo/h8
register "config1" = "0x05" register "config1" = "0x05"
register "config3" = "0xc4" register "config3" = "0xc4"
@ -29,7 +29,7 @@ chip northbridge/intel/sandybridge
register "has_bdc_detection" = "0" register "has_bdc_detection" = "0"
device pnp ff.2 on end device pnp ff.2 on end
end end
end # LPC Controller end
end end
end end
end end