ec/google/chromeec: Update ec_commands.h
This change copies ec_commands.h directly from the Chromium OS EC repo, with the exception of changing the copyright header to SPDX format. Update to commit hash af9a119 Signed-off-by: Boris Mittelberg <bmbm@google.com> Change-Id: I1f2a140257d6127fb19bb514bc345466247b7499 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Boris Mittelberg
Felix Held
parent
636a6dedf9
commit
0c3b7f5411
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@ -177,7 +177,7 @@ extern "C" {
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#define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7)
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/* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
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#define EC_TEMP_SENSOR_ENTRIES 16
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#define EC_TEMP_SENSOR_ENTRIES 16
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/*
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* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
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*
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@ -185,6 +185,10 @@ extern "C" {
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*/
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#define EC_TEMP_SENSOR_B_ENTRIES 8
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/* Max temp sensor entries for host commands */
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#define EC_MAX_TEMP_SENSOR_ENTRIES (EC_TEMP_SENSOR_ENTRIES + \
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EC_TEMP_SENSOR_B_ENTRIES)
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/* Special values for mapped temperature sensors */
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#define EC_TEMP_SENSOR_NOT_PRESENT 0xff
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#define EC_TEMP_SENSOR_ERROR 0xfe
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@ -1499,6 +1503,10 @@ enum ec_feature_code {
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* mux.
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*/
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EC_FEATURE_TYPEC_MUX_REQUIRE_AP_ACK = 43,
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/*
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* The EC supports entering and residing in S4.
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*/
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EC_FEATURE_S4_RESIDENCY = 44,
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};
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#define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32)
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@ -1765,6 +1773,8 @@ struct ec_params_flash_erase_v1 {
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#define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9)
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/* Rollback information flash region protected now */
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#define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10)
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/* Error - Unknown error */
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#define EC_FLASH_PROTECT_ERROR_UNKNOWN BIT(11)
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/**
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@ -2706,6 +2716,8 @@ enum motionsensor_chip {
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MOTIONSENSE_CHIP_ICM42607 = 26,
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MOTIONSENSE_CHIP_BMA422 = 27,
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MOTIONSENSE_CHIP_BMI323 = 28,
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MOTIONSENSE_CHIP_BMI220 = 29,
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MOTIONSENSE_CHIP_CM32183 = 30,
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MOTIONSENSE_CHIP_MAX,
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};
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@ -2856,7 +2868,7 @@ struct ec_params_motion_sense {
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*/
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struct __ec_todo_unpacked {
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/* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
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* kb_wake_angle: angle to wake up AP.
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* kb_wake_angle: angle to wakup AP.
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*/
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int16_t data;
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} kb_wake_angle;
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@ -6051,7 +6063,10 @@ struct ec_params_set_cbi {
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* - The semantic meaning of an entry should not change.
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* - Do not exceed 2^15 - 1 for reset reasons or 2^16 - 1 for shutdown reasons.
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*/
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enum chipset_reset_reason {
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enum chipset_shutdown_reason {
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/*
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* Beginning of reset reasons.
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*/
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CHIPSET_RESET_BEGIN = 0,
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CHIPSET_RESET_UNKNOWN = CHIPSET_RESET_BEGIN,
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/* Custom reason defined by a board.c or baseboard.c file */
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@ -6075,13 +6090,11 @@ enum chipset_reset_reason {
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/* EC detected an AP watchdog event. */
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CHIPSET_RESET_AP_WATCHDOG,
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CHIPSET_RESET_COUNT,
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};
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CHIPSET_RESET_COUNT, /* End of reset reasons. */
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/*
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* AP hard shutdowns are logged on the same path as resets.
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*/
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enum chipset_shutdown_reason {
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/*
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* Beginning of shutdown reasons.
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*/
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CHIPSET_SHUTDOWN_BEGIN = BIT(15),
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CHIPSET_SHUTDOWN_POWERFAIL = CHIPSET_SHUTDOWN_BEGIN,
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/* Forcing a shutdown as part of EC initialization */
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@ -6103,7 +6116,7 @@ enum chipset_shutdown_reason {
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/* Force a chipset shutdown from the power button through EC */
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CHIPSET_SHUTDOWN_BUTTON,
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CHIPSET_SHUTDOWN_COUNT,
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CHIPSET_SHUTDOWN_COUNT, /* End of shutdown reasons. */
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};
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@ -6410,6 +6423,7 @@ enum action_key {
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TK_PREV_TRACK = 17,
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TK_KBD_BKLIGHT_TOGGLE = 18,
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TK_MICMUTE = 19,
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TK_MENU = 20,
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};
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/*
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@ -6619,6 +6633,7 @@ enum typec_control_command {
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TYPEC_CONTROL_COMMAND_EXIT_MODES,
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TYPEC_CONTROL_COMMAND_CLEAR_EVENTS,
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TYPEC_CONTROL_COMMAND_ENTER_MODE,
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TYPEC_CONTROL_COMMAND_TBT_UFP_REPLY,
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};
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/* Modes (USB or alternate) that a type-C port may enter. */
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@ -6628,6 +6643,12 @@ enum typec_mode {
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TYPEC_MODE_USB4,
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};
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/* Replies the AP may specify to the TBT EnterMode command as a UFP */
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enum typec_tbt_ufp_reply {
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TYPEC_TBT_UFP_REPLY_NAK,
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TYPEC_TBT_UFP_REPLY_ACK,
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};
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struct ec_params_typec_control {
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uint8_t port;
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uint8_t command; /* enum typec_control_command */
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@ -6639,8 +6660,12 @@ struct ec_params_typec_control {
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* the command version when adding new sub-commands.
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*/
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union {
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/* Used for CLEAR_EVENTS */
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uint32_t clear_events_mask;
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uint8_t mode_to_enter; /* enum typec_mode */
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/* Used for ENTER_MODE - enum typec_mode */
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uint8_t mode_to_enter;
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/* Used for TBT_UFP_REPLY - enum typec_tbt_ufp_reply */
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uint8_t tbt_ufp_reply;
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uint8_t placeholder[128];
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};
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} __ec_align1;
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@ -6932,8 +6957,9 @@ enum pchg_state {
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/* Port number is encoded in bit[28:31]. */
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#define EC_MKBP_PCHG_PORT_SHIFT 28
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/* Utility macro for converting MKBP event to port number. */
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/* Utility macros for converting MKBP event <-> port number. */
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#define EC_MKBP_PCHG_EVENT_TO_PORT(e) (((e) >> EC_MKBP_PCHG_PORT_SHIFT) & 0xf)
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#define EC_MKBP_PCHG_PORT_TO_EVENT(p) (BIT((p) + EC_MKBP_PCHG_PORT_SHIFT))
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/* Utility macro for extracting event bits. */
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#define EC_MKBP_PCHG_EVENT_MASK(e) ((e) \
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& GENMASK(EC_MKBP_PCHG_PORT_SHIFT-1, 0))
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@ -6942,6 +6968,7 @@ enum pchg_state {
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#define EC_MKBP_PCHG_WRITE_COMPLETE BIT(1)
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#define EC_MKBP_PCHG_UPDATE_CLOSED BIT(2)
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#define EC_MKBP_PCHG_UPDATE_ERROR BIT(3)
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#define EC_MKBP_PCHG_DEVICE_EVENT BIT(4)
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enum ec_pchg_update_cmd {
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/* Reset chip to normal mode. */
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@ -7006,6 +7033,31 @@ enum ec_set_base_state_cmd {
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EC_SET_BASE_STATE_RESET,
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};
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#define EC_CMD_I2C_CONTROL 0x0139
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/* Subcommands for I2C control */
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enum ec_i2c_control_command {
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EC_I2C_CONTROL_GET_SPEED,
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EC_I2C_CONTROL_SET_SPEED,
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};
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#define EC_I2C_CONTROL_SPEED_UNKNOWN 0
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struct ec_params_i2c_control {
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uint8_t port; /* I2C port number */
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uint8_t cmd; /* enum ec_i2c_control_command */
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union {
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uint16_t speed_khz;
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} cmd_params;
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} __ec_align_size1;
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struct ec_response_i2c_control {
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union {
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uint16_t speed_khz;
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} cmd_response;
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} __ec_align_size1;
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/*****************************************************************************/
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/* The command range 0x200-0x2FF is reserved for Rotor. */
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