mainboard/**/devicetree.cb: Fix typo

repalcement ---> replacement

Change-Id: I486170e89f75fa7c01c7322bb8db783fd4f61931
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64404
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2022-05-16 16:34:21 +02:00 committed by Felix Held
parent 035c6c8559
commit 0c6dc828f6
5 changed files with 5 additions and 5 deletions

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@ -183,7 +183,7 @@ chip soc/intel/jasperlake
# For an offset = 12.580, use 12580
register "ImonOffset" = "0"
# Skip the CPU repalcement check
# Skip the CPU replacement check
register "SkipCpuReplacementCheck" = "1"
# Sagv Configuration

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@ -40,7 +40,7 @@ chip soc/intel/elkhartlake
register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" # USB3 WLAN
register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC3)" # UNUSED
# Skip the CPU repalcement check
# Skip the CPU replacement check
register "SkipCpuReplacementCheck" = "1"
# PCIe root ports related UPDs

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@ -53,7 +53,7 @@ chip soc/intel/jasperlake
# EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901"
# Skip the CPU repalcement check
# Skip the CPU replacement check
register "SkipCpuReplacementCheck" = "1"
register "PchHdaDspEnable" = "1"

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@ -38,7 +38,7 @@ chip soc/intel/elkhartlake
register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Port is not used
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Port is not used
# Skip the CPU repalcement check
# Skip the CPU replacement check
register "SkipCpuReplacementCheck" = "1"
# PCIe root ports related UPDs

View File

@ -38,7 +38,7 @@ chip soc/intel/elkhartlake
register "usb3_ports[2]" = "USB3_PORT_EMPTY" # UNUSED
register "usb3_ports[3]" = "USB3_PORT_EMPTY" # UNUSED
# Skip the CPU repalcement check
# Skip the CPU replacement check
register "SkipCpuReplacementCheck" = "1"
# PCIe root ports related UPDs