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AGESA: Drop offset on PCI device enumeration 

Integrated PCI devices in southbridge silicon have static BDFs,
no need to have variables to store the parent bus or an offset
with constant zero.

Change-Id: I37d3794d36b5e5775da9215574ddc199696646d0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6333
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
Kyösti Mälkki 2014-07-21 19:35:16 +03:00
parent 0ff17c9cae
commit 0c797f1c28
44 changed files with 104 additions and 395 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
src/mainboard/amd/dinar/get_bus_conf.c
View File

@ -32,25 +32,6 @@
*/
u8 bus_sb700[2];
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
/*
* HT Chain device num, actually it is unit id base of every ht device in chain,
* assume every chain only have 4 ht device at most
*/
u32 hcdnx[] = {
0x20202020,
};
u32 sbdn_sb700;
void get_bus_conf(void)
{
device_t dev;
@ -58,17 +39,14 @@ void get_bus_conf(void)
printk(BIOS_DEBUG, "Mainboard - Get_bus_conf.c - get_bus_conf - Start.\n");
sbdn_sb700 = 0;
for (i = 0; i < ARRAY_SIZE(bus_sb700); i++) {
bus_sb700[i] = 0;
}
bus_sb700[0] = (pci1234x[0] >> 16) & 0xff;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));

8
src/mainboard/amd/dinar/irq_tables.c
View File

@ -43,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -70,8 +68,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb700[0];
pirq->rtr_devfn = ((sbdn_sb700 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -87,7 +85,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb700[0], ((sbdn_sb700 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

5
src/mainboard/amd/dinar/mptable.c
View File

@ -29,8 +29,6 @@
#include <cpu/amd/amdfam15.h>
extern u8 bus_sb700[2];
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
@ -60,8 +58,7 @@ static void *smp_write_config_table(void *v)
apicid_sb700 = CONFIG_MAX_CPUS + 1;
apicid_rd890 = apicid_sb700 + 1;
//bus_sb700[0], TODO: why bus_sb700[0] use same value of bus_rd890[0] assigned by get_pci1234(), instead of 0.
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sb700 + 0x14, 0));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set sb700 IOAPIC ID */
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;

18
src/mainboard/amd/inagua/get_bus_conf.c
View File

@ -33,17 +33,6 @@
u8 bus_sb800[6];
u32 apicid_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
u32 apicid_base;
@ -52,23 +41,20 @@ void get_bus_conf(void)
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/amd/inagua/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

18
src/mainboard/amd/olivehill/get_bus_conf.c
View File

@ -35,17 +35,6 @@
u8 bus_yangtze[6];
u32 apicid_yangtze;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_yangtze;
void get_bus_conf(void)
{
@ -66,23 +55,20 @@ void get_bus_conf(void)
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
sbdn_yangtze = 0;
memset(bus_yangtze, 0, sizeof(bus_yangtze));
// bus_yangtze[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_yangtze[0] = (pci1234x[0] >> 16) & 0xff;
/* yangtze */
dev = dev_find_slot(bus_yangtze[0], PCI_DEVFN(sbdn_yangtze + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_yangtze[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_yangtze[0], PCI_DEVFN(sbdn_yangtze + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_yangtze[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/amd/olivehill/irq_tables.c
View File

@ -43,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
extern u8 bus_yangtze[6];
extern unsigned long sbdn_yangtze;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -69,8 +67,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_yangtze[0];
pirq->rtr_devfn = ((sbdn_yangtze + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -85,7 +83,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_yangtze[0], ((sbdn_yangtze + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/amd/parmer/get_bus_conf.c
View File

@ -35,17 +35,6 @@
u8 bus_hudson[6];
u32 apicid_hudson;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_hudson;
void get_bus_conf(void)
{
@ -56,23 +45,21 @@ void get_bus_conf(void)
sbdn_hudson = 0;
memset(bus_hudson, 0, sizeof(bus_hudson));
bus_hudson[0] = (pci1234x[0] >> 16) & 0xff;
/* Hudson */
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_hudson[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_hudson[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/amd/parmer/irq_tables.c
View File

@ -43,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
extern u8 bus_hudson[6];
extern unsigned long sbdn_hudson;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -69,8 +67,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_hudson[0];
pirq->rtr_devfn = ((sbdn_hudson + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -85,7 +83,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_hudson[0], ((sbdn_hudson + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/amd/persimmon/get_bus_conf.c
View File

@ -35,16 +35,6 @@ u8 bus_sb800[6];
u32 apicid_sb800;
u32 apicver_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -54,22 +44,19 @@ void get_bus_conf(void)
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/amd/persimmon/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/amd/south_station/get_bus_conf.c
View File

@ -33,16 +33,6 @@
u8 bus_sb800[6];
u32 apicid_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -52,16 +42,13 @@ void get_bus_conf(void)
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
@ -70,7 +57,7 @@ void get_bus_conf(void)
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/amd/south_station/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/amd/thatcher/get_bus_conf.c
View File

@ -35,17 +35,6 @@
u8 bus_hudson[6];
u32 apicid_hudson;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_hudson;
void get_bus_conf(void)
{
@ -54,22 +43,20 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_hudson = 0;
memset(bus_hudson, 0, sizeof(bus_hudson));
bus_hudson[0] = (pci1234x[0] >> 16) & 0xff;
/* Hudson */
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_hudson[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_hudson[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/amd/thatcher/irq_tables.c
View File

@ -43,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
extern u8 bus_hudson[6];
extern unsigned long sbdn_hudson;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -69,8 +67,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_hudson[0];
pirq->rtr_devfn = ((sbdn_hudson + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -85,7 +83,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_hudson[0], ((sbdn_hudson + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

28
src/mainboard/amd/torpedo/get_bus_conf.c
View File

@ -31,26 +31,6 @@
*/
u8 bus_sb900[6];
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
/*
* HT Chain device num, actually it is unit id base of every ht device in chain,
* assume every chain only have 4 ht device at most
*/
u32 hcdnx[] = {
0x20202020,
};
u32 sbdn_sb900;
void get_bus_conf(void)
{
device_t dev;
@ -58,23 +38,21 @@ void get_bus_conf(void)
printk(BIOS_DEBUG, "Mainboard - %s - %s - Start.\n", __FILE__, __func__);
sbdn_sb900 = 0;
memset(bus_sb900, 0, sizeof(bus_sb900));
bus_sb900[0] = (pci1234x[0] >> 16) & 0xff;
/* sb900 */
dev = dev_find_slot(bus_sb900[0], PCI_DEVFN(sbdn_sb900 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb900[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb900[0],
PCI_DEVFN(sbdn_sb900 + 0x14, i));
dev = dev_find_slot(0,
PCI_DEVFN(0x14, i));
if (dev) {
bus_sb900[2 + i] =
pci_read_config8(dev, PCI_SECONDARY_BUS);

8
src/mainboard/amd/torpedo/irq_tables.c
View File

@ -45,8 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb900[6];
extern unsigned long sbdn_sb900;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -72,8 +70,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb900[0];
pirq->rtr_devfn = ((sbdn_sb900 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -89,7 +87,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb900[0], ((sbdn_sb900 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/amd/union_station/get_bus_conf.c
View File

@ -33,16 +33,6 @@
u8 bus_sb800[6];
u32 apicid_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -52,18 +42,15 @@ void get_bus_conf(void)
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
@ -72,7 +59,7 @@ void get_bus_conf(void)
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/amd/union_station/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/asrock/e350m1/get_bus_conf.c
View File

@ -33,16 +33,6 @@
u8 bus_sb800[6];
u32 apicid_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -52,22 +42,19 @@ void get_bus_conf(void)
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/asrock/e350m1/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

16
src/mainboard/asrock/imb-a180/get_bus_conf.c
View File

@ -32,16 +32,7 @@
u8 bus_yangtze[6];
u32 apicid_yangtze;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_yangtze;
void get_bus_conf(void)
{
@ -61,23 +52,20 @@ void get_bus_conf(void)
value &= ~(1 << 11);
pci_write_config32(dev, 0x60, value);
sbdn_yangtze = 0;
memset(bus_yangtze, 0, sizeof(bus_yangtze));
// bus_yangtze[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_yangtze[0] = (pci1234x[0] >> 16) & 0xff;
/* yangtze */
dev = dev_find_slot(bus_yangtze[0], PCI_DEVFN(sbdn_yangtze + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_yangtze[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_yangtze[0], PCI_DEVFN(sbdn_yangtze + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_yangtze[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/asrock/imb-a180/irq_tables.c
View File

@ -43,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
extern u8 bus_yangtze[6];
extern unsigned long sbdn_yangtze;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -69,8 +67,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_yangtze[0];
pirq->rtr_devfn = ((sbdn_yangtze + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -85,7 +83,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_yangtze[0], ((sbdn_yangtze + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

15
src/mainboard/asus/f2a85-m/get_bus_conf.c
View File

@ -33,16 +33,7 @@
u8 bus_hudson[6];
u32 apicid_hudson;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_hudson;
void get_bus_conf(void)
{
@ -51,23 +42,21 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_hudson = 0;
memset(bus_hudson, 0, sizeof(bus_hudson));
bus_hudson[0] = (pci1234x[0] >> 16) & 0xff;
/* Hudson */
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_hudson[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_hudson[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

9
src/mainboard/asus/f2a85-m/irq_tables.c
View File

@ -20,6 +20,7 @@
#include <arch/pirq_routing.h>
#include <console/console.h>
#include <cpu/amd/amdfam15.h>
#include <device/pci_def.h>
#include <stdint.h>
#include <string.h>
@ -42,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
extern u8 bus_hudson[6];
extern unsigned long sbdn_hudson;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -68,8 +67,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_hudson[0];
pirq->rtr_devfn = ((sbdn_hudson + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -84,7 +83,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_hudson[0], ((sbdn_hudson + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

18
src/mainboard/gizmosphere/gizmo/get_bus_conf.c
View File

@ -34,17 +34,6 @@
u8 bus_sb800[6];
u32 apicid_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -53,24 +42,21 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/gizmosphere/gizmo/irq_tables.c
View File

@ -45,8 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -72,8 +70,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -89,7 +87,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/hp/pavilion_m6_1035dx/get_bus_conf.c
View File

@ -34,17 +34,6 @@
u8 bus_hudson[6];
u32 apicid_hudson;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_hudson;
void get_bus_conf(void)
{
@ -53,21 +42,19 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_hudson = 0;
memset(bus_hudson, 0, sizeof(bus_hudson));
bus_hudson[0] = (pci1234x[0] >> 16) & 0xff;
/* Hudson */
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_hudson[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_hudson[0], PCI_DEVFN(sbdn_hudson + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_hudson[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

9
src/mainboard/hp/pavilion_m6_1035dx/irq_tables.c
View File

@ -20,6 +20,7 @@
#include <arch/pirq_routing.h>
#include <cpu/amd/amdfam15.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <string.h>
#include <stdint.h>
@ -42,8 +43,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->rfu = rfu;
}
extern u8 bus_hudson[6];
extern unsigned long sbdn_hudson;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -68,8 +67,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_hudson[0];
pirq->rtr_devfn = ((sbdn_hudson + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -84,7 +83,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_hudson[0], ((sbdn_hudson + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

18
src/mainboard/jetway/nf81-t56n-lf/get_bus_conf.c
View File

@ -36,17 +36,6 @@ u8 bus_sb800[6];
u32 apicid_sb800;
u32 apicver_sb800;
/**
* Here you only need to set value in pci1234 for HT-IO that could be
* installed or not. You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -55,22 +44,19 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

9
src/mainboard/jetway/nf81-t56n-lf/irq_tables.c
View File

@ -21,6 +21,7 @@
#include <arch/pirq_routing.h>
#include <console/console.h>
#include <cpu/amd/amdfam14.h>
#include <device/pci_def.h>
#include <string.h>
#include <stdint.h>
@ -43,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -70,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -86,7 +85,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* PCI Bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

18
src/mainboard/lippert/frontrunner-af/get_bus_conf.c
View File

@ -33,17 +33,6 @@
u8 bus_sb800[6];
u32 apicid_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -52,23 +41,20 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/lippert/frontrunner-af/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

17
src/mainboard/lippert/toucan-af/get_bus_conf.c
View File

@ -33,16 +33,6 @@
u8 bus_sb800[6];
u32 apicid_sb800;
/*
* Here you only need to set value in pci1234 for HT-IO that could be installed or not
* You may need to preset pci1234 for HTIO board,
* please refer to src/northbridge/amd/amdk8/get_sblk_pci1234.c for detail
*/
u32 pci1234x[] = {
0x0000ff0,
};
u32 sbdn_sb800;
void get_bus_conf(void)
{
@ -51,22 +41,19 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_sb800 = 0;
memset(bus_sb800, 0, sizeof(bus_sb800));
// bus_sb800[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb800[0] = (pci1234x[0] >> 16) & 0xff;
/* sb800 */
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sb800[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}
for (i = 0; i < 4; i++) {
dev = dev_find_slot(bus_sb800[0], PCI_DEVFN(sbdn_sb800 + 0x14, i));
dev = dev_find_slot(0, PCI_DEVFN(0x14, i));
if (dev) {
bus_sb800[2 + i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
}

8
src/mainboard/lippert/toucan-af/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sb800[6];
extern unsigned long sbdn_sb800;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sb800[0];
pirq->rtr_devfn = ((sbdn_sb800 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

4
src/mainboard/supermicro/h8qgi/get_bus_conf.c
View File

@ -31,14 +31,12 @@
* and acpi_tables busnum is default.
*/
u8 bus_sp5100[2];
u32 sbdn_sp5100;
void get_bus_conf(void)
{
device_t dev;
int i;
sbdn_sp5100 = 0;
for (i = 0; i < ARRAY_SIZE(bus_sp5100); i++) {
bus_sp5100[i] = 0;
@ -47,7 +45,7 @@ void get_bus_conf(void)
bus_sp5100[0] = 0;
/* sp5100 */
dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);

8
src/mainboard/supermicro/h8qgi/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sp5100[2];
extern unsigned long sbdn_sp5100;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sp5100[0];
pirq->rtr_devfn = ((sbdn_sp5100 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

3
src/mainboard/supermicro/h8qgi/mptable.c
View File

@ -29,7 +29,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_sp5100[2];
extern u32 sbdn_sp5100;
static void *smp_write_config_table(void *v)
{
@ -59,7 +58,7 @@ static void *smp_write_config_table(void *v)
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sp5100 + 0x14, 0));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;

4
src/mainboard/supermicro/h8scm/get_bus_conf.c
View File

@ -31,14 +31,12 @@
* and acpi_tables busnum is default.
*/
u8 bus_sp5100[2];
u32 sbdn_sp5100;
void get_bus_conf(void)
{
device_t dev;
int i;
sbdn_sp5100 = 0;
for (i = 0; i < 0; i++) {
bus_sp5100[i] = 0;
@ -47,7 +45,7 @@ void get_bus_conf(void)
bus_sp5100[0] = 0;
/* sp5100 */
dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);

8
src/mainboard/supermicro/h8scm/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sp5100[2];
extern unsigned long sbdn_sp5100;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sp5100[0];
pirq->rtr_devfn = ((sbdn_sp5100 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -87,7 +85,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
slot_num = 0;
/* pci bridge */
write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

3
src/mainboard/supermicro/h8scm/mptable.c
View File

@ -29,7 +29,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_sp5100[2];
extern u32 sbdn_sp5100;
static void *smp_write_config_table(void *v)
{
@ -59,7 +58,7 @@ static void *smp_write_config_table(void *v)
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sp5100 + 0x14, 0));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;

4
src/mainboard/tyan/s8226/get_bus_conf.c
View File

@ -30,7 +30,6 @@
* and acpi_tables busnum is default.
*/
u8 bus_sp5100[2];
u32 sbdn_sp5100;
void get_bus_conf(void);
@ -39,7 +38,6 @@ void get_bus_conf(void)
device_t dev;
int i;
sbdn_sp5100 = 0;
for (i = 0; i < 0; i++) {
bus_sp5100[i] = 0;
@ -48,7 +46,7 @@ void get_bus_conf(void)
bus_sp5100[0] = 0;
/* sp5100 */
dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(sbdn_sp5100 + 0x14, 4));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 4));
if (dev) {
bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);

8
src/mainboard/tyan/s8226/irq_tables.c
View File

@ -44,8 +44,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_sp5100[2];
extern unsigned long sbdn_sp5100;
unsigned long write_pirq_routing_table(unsigned long addr)
{
@ -71,8 +69,8 @@ unsigned long write_pirq_routing_table(unsigned long addr)
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
pirq->rtr_bus = bus_sp5100[0];
pirq->rtr_devfn = ((sbdn_sp5100 + 0x14) << 3) | 4;
pirq->rtr_bus = 0;
pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
pirq->exclusive_irqs = 0;
@ -88,7 +86,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
/* pci bridge */
write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4,
write_pirq_info(pirq_info, 0, PCI_DEVFN(0x14, 4),
0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
0);
pirq_info++;

4
src/mainboard/tyan/s8226/mptable.c
View File

@ -29,8 +29,6 @@
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_sp5100[2];
extern u32 sbdn_sr5650;
extern u32 sbdn_sp5100;
static void *smp_write_config_table(void *v)
{
@ -60,7 +58,7 @@ static void *smp_write_config_table(void *v)
apicid_sp5100 = CONFIG_MAX_CPUS + 1;
apicid_sr5650 = apicid_sp5100 + 1;
dev = dev_find_slot(0, PCI_DEVFN(sbdn_sp5100 + 0x14, 0));
dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
if (dev) {
/* Set SP5100 IOAPIC ID */
dword = pci_read_config32(dev, 0x74) & 0xfffffff0;