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PCIe : Adding some error/not-null condition checking 

This patch checks for following conditions
(1) while enabling LTR, if PCI_CAP_ID_PCIE is don't found
    then don't enable LTR.
(2)
    2.1) set_L1_ss_latency is member if ops_pci, which could be NULL.
	 so confirm ops_pci is not NULL before calling its member function.
    2.2) if PCI_CAP_ID_PCIE is not found, then don't try to set latency.

BUG=none
BRANCH=none
TEST=build and boot coreboot with L1 substate enabled on sklrvp3.

Change-Id: I31965266f81f2a12ee719f69ed9a20b096c8b315
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3592a7c974186f2f1113cb002db4632c8f1ab181
Original-Change-Id: I95041490f9fafd2d6f57a8279614ccb7994a1447
Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/276423
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Naveenkrishna Ch <naveenkrishna.ch@intel.com>
Original-Tested-by: Naveenkrishna Ch <naveenkrishna.ch@intel.com>
Reviewed-on: http://review.coreboot.org/10559
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Pratik Prajapati 2015-06-09 12:06:20 -07:00 committed by Patrick Georgi
parent 121b4c09c4
commit 0cd0d28f0a
1 changed files with 8 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/device/pciexp_device.c
View File

@ -147,7 +147,8 @@ static void pciexp_config_max_latency(device_t root, device_t dev)
{ {
unsigned int cap; unsigned int cap;
cap = pciexp_find_extended_cap(dev, PCIE_EXT_CAP_LTR_ID); cap = pciexp_find_extended_cap(dev, PCIE_EXT_CAP_LTR_ID);
if (root->ops->ops_pci->set_L1_ss_latency != NULL) if ((cap) && (root->ops->ops_pci != NULL) &&
(root->ops->ops_pci->set_L1_ss_latency != NULL))
root->ops->ops_pci->set_L1_ss_latency(dev, cap + 4); root->ops->ops_pci->set_L1_ss_latency(dev, cap + 4);
} }
@ -155,7 +156,11 @@ static void pciexp_enable_ltr(device_t dev)
{ {
unsigned int cap; unsigned int cap;
cap = pci_find_capability(dev, PCI_CAP_ID_PCIE); cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
if(!cap) {
printk(BIOS_INFO, "Failed to enable LTR for dev = %s\n",
dev_path(dev));
return;
}
pcie_update_cfg(dev, cap + 0x28, ~(1 << 10), 1 << 10); pcie_update_cfg(dev, cap + 0x28, ~(1 << 10), 1 << 10);
} }