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sc7280: Add support for USB 

Adding USB addressmap for sc7280.
Use common USB driver for sc7280.

BUG=b:182963902
TEST=Validated USB enumeration on qcom sc7280 development board

Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
Change-Id: Ib92b74c8035a8c0148a9aa48e7870b261b832a33
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56092
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Ravi Kumar Bokka 2021-07-05 21:11:27 +05:30 committed by Shelley Chen
parent 6c2b860691
commit 0cd6ab338c
2 changed files with 14 additions and 0 deletions
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4
src/soc/qualcomm/sc7280/Makefile.inc
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@ -30,12 +30,16 @@ romstage-y += shrm_load_reset.c
romstage-y += ../common/qclib.c romstage-y += ../common/qclib.c
romstage-y += ../common/mmu.c romstage-y += ../common/mmu.c
romstage-y += mmu.c romstage-y += mmu.c
romstage-y += ../common/usb/usb.c
romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c romstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c
################################################################################ ################################################################################
ramstage-y += soc.c ramstage-y += soc.c
ramstage-y += cbmem.c ramstage-y += cbmem.c
ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c ramstage-$(CONFIG_DRIVERS_UART) += ../common/qupv3_uart.c
ramstage-y += ../common/usb/usb.c
ramstage-y += ../common/usb/snps_usb_phy.c
ramstage-y += ../common/usb/qmpv4_usb_phy.c
ramstage-y += ../common/aop_load_reset.c ramstage-y += ../common/aop_load_reset.c
ramstage-y += cpucp_load_reset.c ramstage-y += cpucp_load_reset.c

10
src/soc/qualcomm/sc7280/include/soc/addressmap.h
View File

@ -58,4 +58,14 @@
#define EPSSTOP_EPSS_TOP 0x18598000 #define EPSSTOP_EPSS_TOP 0x18598000
#define EPSSFAST_BASE_ADDR 0x18580000 #define EPSSFAST_BASE_ADDR 0x18580000
/*
* USB BASE ADDRESSES
*/
#define HS_USB_PRIM_PHY_BASE 0x088e3000
#define QMP_PHY_QSERDES_COM_REG_BASE 0x088e9000
#define QMP_PHY_QSERDES_TX_REG_BASE 0x088e9200
#define QMP_PHY_QSERDES_RX_REG_BASE 0x088e9400
#define QMP_PHY_PCS_REG_BASE 0x088e9c00
#define USB_HOST_DWC3_BASE 0x0a60c100
#endif /* __SOC_QUALCOMM_SC7280_ADDRESS_MAP_H__ */ #endif /* __SOC_QUALCOMM_SC7280_ADDRESS_MAP_H__ */