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mb/google/guybrush: simplify LPC_MISC_CONTROL_BITS update 

Since the LPC_LDRQ0_PD_EN gets set right after it got cleared, we can
remove the clearing of that bit. This is split off from the previous
patch to be able to use timeless build to verify that the previous patch
didn't change any behavior.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ieb300e7c7ce7e74c32ebdade0360ee4bd499b11a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
Felix Held 2021-09-30 18:01:18 +02:00 committed by Felix Held
parent abbb5b58ec
commit 0cd81c325c
1 changed files with 1 additions and 1 deletions
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src/mainboard/google/guybrush/bootblock.c
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@ -35,7 +35,7 @@ void bootblock_mainboard_early_init(void)
const struct soc_amd_gpio *base_gpios, *override_gpios; const struct soc_amd_gpio *base_gpios, *override_gpios;
dword = pci_read_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS); dword = pci_read_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS);
dword &= ~(LPC_LDRQ0_PU_EN | LPC_LDRQ0_PD_EN | LPC_LDRQ1_EN | LPC_LDRQ0_EN); dword &= ~(LPC_LDRQ0_PU_EN | LPC_LDRQ1_EN | LPC_LDRQ0_EN);
dword |= LPC_LDRQ0_PD_EN; dword |= LPC_LDRQ0_PD_EN;
pci_write_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS, dword); pci_write_config32(SOC_LPC_DEV, LPC_MISC_CONTROL_BITS, dword);