soc/intel/elkhartlake/systemagent: Disable RAPL based on Kconfig
This patch provides the possibility for EHL based boards to disable RAPL settings via SOC_INTEL_DISABLE_POWER_LIMITS config switch. On Elkhart Lake the way via setting relevant MSR bits does not work. Therefore the way via MCHBAR is choosen. Test: Check MCHBAR mapped registers (MCH_PKG_POWER_LIMIT) on mc_ehl1. Change-Id: I5be6632b15ab8e14a21b5cd35152f82fec919d9f Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63547 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -21,7 +21,9 @@
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#define VTBAR_MASK 0x7ffffff000ull
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#define MCH_PKG_POWER_LIMIT_LO 0x59a0
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#define PKG_PWR_LIM_1_EN (1 << 15)
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#define MCH_PKG_POWER_LIMIT_HI 0x59a4
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#define PKG_PWR_LIM_2_EN (1 << 15)
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#define MCH_DDR_POWER_LIMIT_LO 0x58e0
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#define MCH_DDR_POWER_LIMIT_HI 0x58e4
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@ -48,6 +48,7 @@ void soc_systemagent_init(struct device *dev)
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{
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struct soc_power_limits_config *soc_config;
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config_t *config;
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uint32_t value;
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/* Enable Power Aware Interrupt Routing */
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enable_power_aware_intr();
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@ -56,7 +57,16 @@ void soc_systemagent_init(struct device *dev)
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enable_bios_reset_cpl();
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mdelay(1);
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config = config_of_soc();
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soc_config = &config->power_limits_config;
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set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
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if (CONFIG(SOC_INTEL_DISABLE_POWER_LIMITS)) {
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printk(BIOS_INFO, "Skip setting RAPL per configuration\n");
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/* clear bits 47, 15 in PACKAGE_RAPL_LIMIT_0_0_0_MCHBAR_PCU */
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value = MCHBAR32(MCH_PKG_POWER_LIMIT_LO);
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MCHBAR32(MCH_PKG_POWER_LIMIT_LO) = value & ~(PKG_PWR_LIM_1_EN);
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value = MCHBAR32(MCH_PKG_POWER_LIMIT_HI);
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MCHBAR32(MCH_PKG_POWER_LIMIT_HI) = value & ~(PKG_PWR_LIM_2_EN);
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} else {
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config = config_of_soc();
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soc_config = &config->power_limits_config;
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set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config);
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}
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}
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