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intel/cmn/smm: Introduce PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B 

Certain chipsets/SoCs like Apollo Lake use GEN_PMCON_B for periodic SMI
rate selection unlike other chipsets which use GEN_PMCON_A. Introduce new Kconfig option PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B to
indicate the register difference.

Based on Apollo Lake datasheet Vol. 3 Revision 005:
https://cdrdv2.intel.com/v1/dl/getContent/334819

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I11241836ecc9066d323977b030686567c87ed256
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69870
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
This commit is contained in:
Michał Żygowski 2022-11-21 12:43:04 +01:00
parent 12a448224f
commit 0d28b978e5
1 changed files with 9 additions and 0 deletions
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9
src/soc/intel/common/block/smm/Kconfig
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@ -44,3 +44,12 @@ config HECI_DISABLE_USING_SMM
help
HECI disable using SMM. Select this option to make HECI disable
using SMM mode, independent of dedicated UPD to perform HECI disable.
config PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B
bool
depends on SOC_INTEL_COMMON_BLOCK_SMM
default n
help
Intel Core processors select the periodic SMI rate via GEN_PMCON_A.
On Intel Atom processors the register is different and they use
GEN_PMCON_B/GEN_PMCON2 with different address.