amd/amdmct/mct_ddr3: Set prefetch double stride to improve performance
Change-Id: I34ad85388c6b71f0d44bee13afd663e0b84545cd Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12037 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -5313,6 +5313,7 @@ static void mct_FinalMCT_D(struct MCTStatStruc *pMCTstat,
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val &= ~(0x7 << 8); /* CohPrefPrbLmt = 0x1 */
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val |= (0x1 << 8);
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val |= (0x1 << 12); /* EnSplitDctLimits = 0x1 */
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val |= (0x1 << 20); /* DblPrefEn = 0x1 */
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val |= (0x7 << 22); /* PrefFourConf = 0x7 */
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val |= (0x7 << 25); /* PrefFiveConf = 0x7 */
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val &= ~(0xf << 28); /* DcqBwThrotWm = 0x0 */
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