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Documentation: Add SandyBridge NRI feature matrix 

Change-Id: I69b014430802de132c8d9b6c8409bc762b995468
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/27093
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2018-06-11 19:36:08 +02:00 committed by Patrick Georgi
parent cf45830982
commit 0d42a2c421
2 changed files with 90 additions and 0 deletions
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1
Documentation/northbridge/intel/sandybridge/index.md
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@ -5,3 +5,4 @@ This section contains documentation about coreboot on specific Intel "Sandy Brid
## Topics ## Topics
- [Native Ram Initialization](nri.md) - [Native Ram Initialization](nri.md)
- [RAM initialization feature matrix](nri_features.md)

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Documentation/northbridge/intel/sandybridge/nri_features.md Normal file
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@ -0,0 +1,89 @@
# RAM initialization feature matrix
## Options
1. Native raminit
* Open Source
* Native Raminit is working for most frequencies on most boards.
* There might be errors to fix.
* Position in romstage doesn't matter.
2. mrc.bin raminit
* Closed Source (aka BLOB)
* No known errors.
* Needs to be placed at fixed offset in romstage.
## Native raminit implemented features
```eval_rst
+---------------------------+----------------------+-------------+---------+---------------------+
| Option | Supported | Implemented | Working | Description |
+===========================+======================+=============+=========+=====================+
| **Supported channels** |
+---------------------------+----------------------+-------------+---------+---------------------+
| single and dual channel | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| Up to 4 slots | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| Up to 4 ranks per channel | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| **Supported frequencies** |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-1066 (533MHz) | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-1600 (800MHz) | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-1866 (933MHz) | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-2133 (1066MHz) | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-1400 (700MHz) | yes (IvyBridge only) | yes | yes | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-1800 (900MHz) | yes (IvyBridge only) | yes | yes | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-2000 (1000MHz) | yes (IvyBridge only) | yes | yes | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-2200 (1100MHz) | yes (IvyBridge only) | yes | yes | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-2400 (1200MHz) | yes (IvyBridge only) | yes | yes | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| DDR3-1800 (900MHz) | yes (IvyBridge only) | yes | yes | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| **Supported CAS latencies** |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL6 | yes | yes | ? | |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL7 | yes | yes | ? | |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL8 | yes | yes | ? | |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL9 | yes | yes | ? | |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL10 | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL11 | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL12 | yes | yes | ? | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL13 | yes | yes | yes | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL14 | yes | yes | ? | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| CL15 | yes | yes | ? | Since coreboot 4.6 |
+---------------------------+----------------------+-------------+---------+---------------------+
| **MRC cache (stored timings of last training)** |
+---------------------------+----------------------+-------------+---------+---------------------+
| S3 | yes | yes | yes | |
+---------------------------+----------------------+-------------+---------+---------------------+
| normal boot | yes | yes | yes | reset on CRC16 diff |
+---------------------------+----------------------+-------------+---------+---------------------+
| **XMP support** |
+---------------------------+----------------------+-------------+---------+---------------------+
| XMP Profile 1 | yes | yes | yes | only 1.5 V profiles |
+---------------------------+----------------------+-------------+---------+---------------------+
| XMP Profile 2 | yes | yes | no | not activated |
+---------------------------+----------------------+-------------+---------+---------------------+
| **ECC support** |
+---------------------------+----------------------+-------------+---------+---------------------+
| ECC | yes | no | | |
+---------------------------+----------------------+-------------+---------+---------------------+
```